SLUA271
Abstract: QFN PACKAGE thermal resistance JESD51-7 QFN PACKAGE Junction to PCB thermal resistance CDCM1802 CDCM1802RGTR SCAA062 SLUA
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
SLUA271
QFN PACKAGE thermal resistance
JESD51-7
QFN PACKAGE Junction to PCB thermal resistance
CDCM1802
CDCM1802RGTR
SCAA062
SLUA
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759A − APRIL 2004 − JULY 2009 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6
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Original
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CDCM1802
SCAS759A
800-MHz
200-MHz
16-Pin
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
CDCM1802:
/USER-SHARED/TXIIS18762-1
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PDF
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SLUA271
Abstract: CDCM1802 CDCM1802RGTR SCAA062
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
SLUA271
CDCM1802
CDCM1802RGTR
SCAA062
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PDF
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SLUA271
Abstract: SCAA062 CDCM1802 CDCM1802RGTR
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
SLUA271
SCAA062
CDCM1802
CDCM1802RGTR
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
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CDCM1802
Abstract: CDCM1802RGTR SCAA062 SLUA271
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
CDCM1802
CDCM1802RGTR
SCAA062
SLUA271
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PDF
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CDCM1802
Abstract: CDCM1802RGTR SCAA062 SLUA271
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
CDCM1802
CDCM1802RGTR
SCAA062
SLUA271
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PDF
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CDCM1802
Abstract: SCAA062 SLUA271
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
CDCM1802
SCAA062
SLUA271
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
|
Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
|
Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
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CDCM1802
Abstract: CDCM1802RGTR CDCM1802RGTRG4 SCAA062 SLUA271
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
CDCM1802
CDCM1802RGTR
CDCM1802RGTRG4
SCAA062
SLUA271
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
|
PDF
|
SLUA271
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
MSP430
S325F5351WYYRQC1JAVR3KQ
CDCM1802RGT
SLUA271
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PDF
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Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
16-Pin
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PDF
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CDCM1802
Abstract: SCAA062 SLUA271
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6 D 1 Vss D D VDDPECL
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Original
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CDCM1802
SCAS759
800-MHz
200-MHz
CDCM1802
SCAA062
SLUA271
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759A − APRIL 2004 − JULY 2009 D Distributes One Differential Clock Input to EN S1 Vss S0 16 15 14 13 11 Y0 IN 3 10 Y0 VBB 4 9 VDD0 8 2 Vdd1 IN 7 VDD0 Y1 D D 12 6
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Original
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CDCM1802
SCAS759A
800-MHz
200-MHz
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PDF
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HP6624A
Abstract: HP6624A system DC power supply anritsu CDC1803 PRBS 9349 transistor voltage diagram CDCM1802 CDCP1803 TDS694C eye pattern
Text: Application Report SCAA074 – September 2004 Dual Purposes: Data Buffer, the Other Face of the CDCP1803 H. McClendon, C. Sterzik, K. Mustafa . High Performance Analog ABSTRACT The CDCP1803 is a clock driver by design, but can be used as a data buffer. The
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Original
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SCAA074
CDCP1803
CDCP1803
HP6624A
HP6624A system DC power supply
anritsu
CDC1803
PRBS
9349 transistor voltage diagram
CDCM1802
TDS694C
eye pattern
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PDF
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PN9000
Abstract: M1802 Aeroflex PN9000 pn9000 Absolute Phase Noise Measurements M1804 52918 TDS694C CDCM1802 CDCM1804 HP6624A
Text: Application Report SCAA073 – August 2004 Small Package, Big Performance Heather McClendon / Kal Mustafa High Performance Analog ABSTRACT This application report presents phase jitter and phase noise measurements of four differential clock drivers. Two Texas Instruments devices were compared to two
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Original
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SCAA073
CDCM1804
CDCM1802
PN9000
M1802
Aeroflex PN9000
pn9000 Absolute Phase Noise Measurements
M1804
52918
TDS694C
HP6624A
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PDF
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