SN74LVC841
Abstract: No abstract text available
Text: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307A – MARCH 1993 – REVISED JULY 1995 D D D D D EPIC Enhanced-Performance Implanted CMOS Submicron Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
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SN74LVC841
10-BIT
SCAS307A
SN74LVC841
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Untitled
Abstract: No abstract text available
Text: I T SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307A-MARCH 1 9 9 3 -REVISED JULY 1995 DB, DW, OR PW PACKAQE TOP VIEW • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • Typical Volp (Output Ground Bounce) < 0.8 V at Vcc = 3.3 V, TA = 25°C
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OCR Scan
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SN74LVC841
10-BIT
SCAS307A-MARCH
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PDF
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SN74LVC841
Abstract: No abstract text available
Text: SN74LVC841 10-BIT BUS-INTERFACE D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS307A - MARCH 1993 - REVISED JULY 1995 DB, DW, OR PW PACKAGE TOP VIEW EPIC (Enhanced-Performance Implanted CMOS) Submicron Process Typical V o lp (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C
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OCR Scan
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SN74LVC841
10-BIT
SCAS307A
SN74LVC841
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PDF
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