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    SCAN50C400 Search Results

    SCAN50C400 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SCAN50C400 National Semiconductor 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver Original PDF
    SCAN50C400A National Semiconductor SCAN50C400 - 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver Original PDF
    SCAN50C400AUT National Semiconductor 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver Original PDF

    SCAN50C400 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HR4nC

    Abstract: AN1328
    Text: OBSOLETE SCAN50C400 www.ti.com SNOSA22G – MAY 2004 – REVISED MARCH 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver Check for Samples: SCAN50C400 FEATURES • • • • • • • • • 1 2 • • • Quad Backplane SERDES transceiver


    Original     		PDF SCAN50C400 SNOSA22G SCAN50C400A HR4nC AN1328

    AA10

    Abstract: AA13 AB14 P802 SCAN50C400A SCAN50C400AUT UFJ440A AN-124 AN-1242 national
    Text: February 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board


    Original     		PDF SCAN50C400A SCAN50C400A AA10 AA13 AB14 P802 SCAN50C400AUT UFJ440A AN-124 AN-1242 national

    AA10

    Abstract: AA13 P802 SCAN50C400 UFJ440A SCAN50C400UT AN-124
    Text: January 2004 SCAN50C400 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver General Description Features The SCAN50C400 is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board


    Original     		PDF SCAN50C400 SCAN50C400 AA10 AA13 P802 UFJ440A SCAN50C400UT AN-124

    T2D 86

    Abstract: AN1242 bist store "test pattern" 00FF AN-1328 SCAN50C400 "T2D" AN-1242 T2D18
    Text: National Semiconductor Application Note 1328 October 2004 The SCAN50C400 is a high-speed backplane Serializer/ Deserializer SerDes with four channels of 5 Gbps serializers and de-serializers capable of error-free data transmission across a backplane. It provides a total through-put of 20


    Original     		PDF SCAN50C400 CSP-9-111C2) CSP-9-111S2) CSP-9-111S2. T2D 86 AN1242 bist store "test pattern" 00FF AN-1328 "T2D" AN-1242 T2D18

    ht4 marking

    Abstract: No abstract text available
    Text: February 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board


    Original     		PDF SCAN50C400A SCAN50C400A ht4 marking

    AN-1242 national

    Abstract: No abstract text available
    Text: SCAN50C400 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver Literature Number: SNOSA22G February 2007 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane


    Original     		PDF SCAN50C400 SCAN50C400A SNOSA22G AN-1242 national

    AA10

    Abstract: AA13 P802 SCAN50C400A SCAN50C400AUT UFJ440A MDIO communication protocol AN1242 HT4 MARKING
    Text: SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-rate Backplane Transceiver General Description Features The SCAN50C400A is a four-channel high-speed backplane transceiver SERDES designed to support multiple line data rates at 1.25, 2.5 or 5.0 Gbps over a printed circuit board


    Original     		PDF SCAN50C400A SCAN50C400A CSP-9-111C2) CSP-9-111S2) CSP-9-111S2. AA10 AA13 P802 SCAN50C400AUT UFJ440A MDIO communication protocol AN1242 HT4 MARKING

    HR4nC

    Abstract: t25VD AN-1242
    Text: OBSOLETE SCAN50C400 www.ti.com SNOSA22H – JANUARY 2004 – REVISED APRIL 2013 SCAN50C400A 1.25/2.5/5.0 Gbps Quad Multi-Rate Backplane Transceiver Check for Samples: SCAN50C400 FEATURES DESCRIPTION • • • • • The SCAN50C400A is a four-channel high-speed


    Original     		PDF SCAN50C400 SNOSA22H SCAN50C400A HR4nC t25VD AN-1242

    SCAN50C400

    Abstract: SCAN50C400UT
    Text: BR4004_5GIGV2 1/9/04 1:03 PM Page 1 SCAN50C400-Quad 1.25/2.5/5.0 Gbps backplane SerDes SCLK Channel 1, 2 Bist test pattern PLL LVDS input register F I F O LVDS transmit LVDS input register F I F O LVDS recieve LVDS output register F I F O LVDS transmit Serializer


    Original     		PDF BR4004 SCAN50C400-Quad SCAN50C400 SCAN50C400UT 25G/2 EVM50C400 SCAN50C400UT

    lm2679-adj

    Abstract: uaa 3100 lm2679-adj 10A LM8365 STA112 z10a adj 2576 ADC78H90 EP2S15 LM2647
    Text: ナショナル セミコンダクター Altera FPGA および CPLD 向け電源デザイン・ガイド 2005年 秋 対象 Altera 製品 : ナショナルの全 FPGA ソリューションを紹介 : Stratix II FPGA ファミリ • LVDS インタフェース製品


    Original     		PDF LM5070 TSSOP-16 LLP-16 LM3670/71 600mA OT-23 OT23-5 LM3671 600mA2MHz lm2679-adj uaa 3100 lm2679-adj 10A LM8365 STA112 z10a adj 2576 ADC78H90 EP2S15 LM2647

    DS90LV47

    Abstract: 640Mbps EPM240 SCAN50C400A EQ50F100 SCAN50C400
    Text: MISC_92 FPGA Flyer 2/7/05 1:00 PM Page 1 National’s high-speed interface solutions: Simplifying and enhancing FPGA system design Serializers and deserializers Clock and data distribution LVDS crosspoint switches N ational Semiconductor is the leader in innovation and


    Original     		PDF DS90LV001 DS90LV110A SCANSTA111/112 DS90LV47 640Mbps EPM240 SCAN50C400A EQ50F100 SCAN50C400

    AN-1380

    Abstract: EQ50F100 LM27262 SCAN50C400
    Text: National Semiconductor Application Note 1380 TK Chin April 2005 1.0 Introduction Figure 1 shows the transmission loss of a 20-inch FR4 board trace using a 6-mil trace width versus a 20-inch backplane using an 8-mil trace width. Figure 2 illustrates the dominating


    Original     		PDF 20-inch 20-inch 10-inch CSP-9-111C2) CSP-9-111S2) CSP-9-111S2. AN-1380 EQ50F100 LM27262 SCAN50C400

    Virtex-4 serdes

    Abstract: camera-link to hd-SDI converter schematic satellite finder BELDEN 1700A dp83848 1470 LM camera-link to SDI converter CAT5E Pinout DP83865 SCHEMATIC dp83848 data sheet
    Text: Interface Selection Guide March 2007 LVDS Drivers/Receivers Tranceivers . 5-6 LVDS and CML PHYs Differential to Differential . 7-10 SerDes . . 11-13 Serial Digital Interface (SDI) . . 14-16


    Original     		PDF AN-1113 LMH0031 AN-1320 LMH0034 AN-1372 Virtex-4 serdes camera-link to hd-SDI converter schematic satellite finder BELDEN 1700A dp83848 1470 LM camera-link to SDI converter CAT5E Pinout DP83865 SCHEMATIC dp83848 data sheet

    Untitled

    Abstract: No abstract text available
    Text: DS90CR215,DS90CR216A,DS90CR217, DS90CR218A,DS90CR285,DS90CR286A, DS90CR287,DS90CR288A,DS90CR481, DS90CR482,DS90CR483A,DS90CR484A, DS90CR485,DS90CR486 Literature Number: SNLA167 National Semiconductor Channel Link Design Guide June 2006 Introduction Page 2


    Original     		PDF DS90CR215 DS90CR216A DS90CR217, DS90CR218A DS90CR285 DS90CR286A, DS90CR287 DS90CR288A DS90CR481, DS90CR482

    camera-link to hd-SDI converter

    Abstract: QFN-64 footprint Virtex-4 serdes schematic usb to rj45 cable extender Virtex-4 uart controller datasheet usb to lvds converter camera-link to SDI converter LQFP-64 footprint schematic satellite finder dp83848 application
    Text: Interface Products Selection Guide 4Q 2006 LVDS Drivers/Receivers Transceivers . 5-6 LVDS and CML PHYs Differential to Differential . 7-10 SerDes . 11-13 Serial Digital Interface


    Original     		PDF

    LM2596 schematic constant current

    Abstract: XILINX/SPARTAN 3E STARTER BOARD new-era voltage regulator interfacing rj45 with spartan-3 fpga schematic usb to rj45 cable extender SPARTAN 3E STARTER BOARD receiver Vari-L VCO 116 Application Note LM358 RF receiver module FPGA XILINX spartan3 pwm generator virtex 5 vs spartan 3e adc
    Text: National Semiconductor’s Solutions for Xilinx Field Programmable Gate Arrays FPGAs Design Guide Spring 2007 Your fast, accurate guide to choose the best National Semiconductor Solutions. Analog Solutions for FPGAs Page 2 Power Solutions for FPGAs Page 3


    Original     		PDF O-220 O-263 FBGA-49L TQFP-64 AEM-NSCGUIDE/01 LM2596 schematic constant current XILINX/SPARTAN 3E STARTER BOARD new-era voltage regulator interfacing rj45 with spartan-3 fpga schematic usb to rj45 cable extender SPARTAN 3E STARTER BOARD receiver Vari-L VCO 116 Application Note LM358 RF receiver module FPGA XILINX spartan3 pwm generator virtex 5 vs spartan 3e adc

    LEADLESS LM5070

    Abstract: pin diagram for IC 4580 ADC78H90 LM2633 LM2679 spec switcher lm2679-adj LMH6714 LM2647 LM2743 LM2798
    Text: Power Management Design Guide for Altera FPGAs and CPLDs Fall 2005 Altera devices covered: Also features National’s FPGA solutions for: Stratix® II FPGA family Stratix® FPGA family Cyclone FPGA family MAX® II CPLD family • Communications interface, including LVDS


    Original     		PDF LM5070 O-263 OT-23 LEADLESS LM5070 pin diagram for IC 4580 ADC78H90 LM2633 LM2679 spec switcher lm2679-adj LMH6714 LM2647 LM2743 LM2798

    DS90CR287

    Abstract: M600 AN-1109 DS90CR212
    Text: National Semiconductor Channel Link Design Guide June 2006 Introduction Page 2 Chip Operation Pages 12 - 15 Design Guidelines Pages 4 - 10 Evaluation Kits Pages 11 Cables & Connectors Speed vs Cable Length Page 6 Pages 18 - 19 Channel Link LVDS SerDes “Virtual Ribbon Cable”


    Original     		PDF DS90CR2xx DS90CR4xx DS90CR287 M600 AN-1109 DS90CR212

    LM2857

    Abstract: LM3871 sot23 jsw jsw soic LM3871-Adj EP1C40 LM387M lm2679-adj S0T23 DS90LV47
    Text: 2 H I B I i Î Ê » l 2 Altera FPGAfil- C P L D * l-Ha =|^ s.| 2005^71 o > t e z i # Stratix II F P G A # Aft ^ ss 1 Stratix F P G A # M jA l^ s ] S S 2 Cyclone F P G A # m m e la s i s s . 3 M AX II C P L D # f l f l M W U s| S S !


    OCR Scan     		PDF H05L3 2005t LM2857 LM3871 sot23 jsw jsw soic LM3871-Adj EP1C40 LM387M lm2679-adj S0T23 DS90LV47

    lm3371

    Abstract: LM3871 LM267M pj87 LM6642 EP1C40 lm3870 S0T23-B lm2679-adj s0123
    Text: iü M iü ü itfï l U Altera PFPG R C P L D rfn iS ^ ftl^ ! m * 2 0 0 5 ^ 7 ^ >-s MAltera » >m m m u x m i& n & im M v in & m m i fp g a a Stratix II FPGA m & x m . 1 (GELD) » J Ë » j i M S Ï ^ $ 3 RÎ Zfcill Altera Stratix® ' Stratix H® '


    OCR Scan     		PDF