DS8482
Abstract: HI-8482 raytheon analog 8 pin dip
Text: June 2000 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual differential line receiver in accordance with the requirements of the ARINC 429 bus specification. The device translates incoming ARINC 429 signals to normal CMOS/TTL levels on each of its two independent receive channels. The HI-8482 is also functionally equivalent to the Fairchild/Raytheon RM3183.
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HI-8482
RM3183.
20-PIN
DS8482
raytheon analog 8 pin dip
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CERAMIC LEADLESS CHIP CARRIER package
Abstract: HI-8482 HI-8482CM DS8482
Text: January 2001 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual differential line receiver in accordance with the requirements of the ARINC 429 bus specification. The device translates incoming ARINC 429 signals to normal CMOS/TTL levels on each of its two independent receive channels. The HI-8482 is also functionally equivalent to the Fairchild/Raytheon RM3183.
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HI-8482
RM3183.
20-PIN
CERAMIC LEADLESS CHIP CARRIER package
HI-8482CM
DS8482
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EF4442
Abstract: RM3183 RM3182 RM3183L RM3183S ARINC 429, Receiver
Text: www.fairchildsemi.com RM3183 Dual ARINC 429 Line Receiver Features • • • • • • • • clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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RM3183
Mil-Std-883B
20-pin
DS30003183
EF4442
RM3183
RM3182
RM3183L
RM3183S
ARINC 429, Receiver
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PDF
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EF4442
Abstract: ARINC-429 driver RM3182 RM3183 RM3183L RM3183S
Text: Electronics Semiconductor Division RM3183 Dual ARINC 429 Line Receiver Features • • • • • • • • clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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RM3183
Mil-Std-883B
20-pin
DS30003183
EF4442
ARINC-429 driver
RM3182
RM3183
RM3183L
RM3183S
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PDF
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HI-8482PSI
Abstract: HI-8482 HI-8482PST HI-8482CM-01 CERAMIC LEADLESS CHIP CARRIER package DPLC HI-6010 HI-8482J HI-8482JT HI-8683
Text: February 2001 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual differential line receiver in accordance with the requirements of the ARINC 429 bus specification. The device translates incoming ARINC 429 signals to normal CMOS/TTL levels on each of its two independent receive channels. The HI-8482 is also functionally equivalent to the Fairchild/Raytheon RM3183.
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Original
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HI-8482
RM3183.
HI-8482J
HI-8482JT
20-PIN
HI-8482PSI
HI-8482PST
HI-8482CM-01
CERAMIC LEADLESS CHIP CARRIER package
DPLC
HI-6010
HI-8482J
HI-8482JT
HI-8683
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PDF
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B-3067
Abstract: B-3226 TST-9107 DD-03182GP-200 ddc b-3067 DD-03282GP-200 B-3227 HS1-3182-5 ddc B-3226 DD-03282DC-120
Text: INDUSTRY CROSS REFERENCE GUIDE ARINC 429 PACKAGE HOLT PART DEI LINE DRIVER 16-PIN CERAMIC SIDE-BRAZED DIP 16-PIN CERAMIC SIDE-BRAZED DIP 16-PIN CERAMIC SIDE-BRAZED DIP 16-PIN CERAMIC SIDE-BRAZED DIP 28-PIN CERAMIC LEADLESS CHIP CARRIER 28-PIN CERAMIC LEADLESS CHIP CARRIER
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16-PIN
28-PIN
B-3067
B-3226
TST-9107
DD-03182GP-200
ddc b-3067
DD-03282GP-200
B-3227
HS1-3182-5
ddc B-3226
DD-03282DC-120
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PDF
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DEI3283
Abstract: DEI3283-SAS M1-0104 dei3283-ses
Text: Device Engineering Incorporated 385 East Alamo Drive Chandler, AZ 85225 Phone: 480 303-0822 Fax: (480) 303-0824 E-mail: admin@deiaz.com DEI3283 DUAL ARINC 429 LINE RECEIVER FEATURES Two separate analog receiver channels Converts ARINC 429 levels to serial data
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DEI3283
/-200V
MIL-STD-883B
RM3283
RM3183
HI-8482
DS-MW-03283-01
DEI3283-SAS
M1-0104
dei3283-ses
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PDF
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ic 7493 truth table
Abstract: HI-8482 HI-6010 HI-8482J HI-8482JT HI-8482PSI HI-8482PST HI-8683 RM3183 DS8482
Text: HI-8482 ARINC 429 Dual Line Receiver March 2007 OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the
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HI-8482
HI-8482
HI-6010,
HI-8683
ARIN80
20-PIN
ic 7493 truth table
HI-6010
HI-8482J
HI-8482JT
HI-8482PSI
HI-8482PST
RM3183
DS8482
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PDF
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HI-8482
Abstract: No abstract text available
Text: HI-8482 ARINC 429 DUAL LINE RECEIVER OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the
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HI-8482
HI-8482
RM3183.
20-PIN
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PDF
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Untitled
Abstract: No abstract text available
Text: December 1999 GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS device designed as a dual line receiver in accordance with the requirements of the ARINC 429 bus specification. It contains two independent ARINC receiver channels which accept differential input signals and converts them
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HI-8482
RM3183.
20-PIN
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PDF
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SE 135
Abstract: DEI3283-EMS DEI3283 DEI3283-SES A429 HI-8482 RM3183 RM3283 direct replacement M1015
Text: Device Engineering Incorporated 385 East Alamo Drive Chandler, AZ 85225 Phone: 480 303-0822 Fax: (480) 303-0824 E-mail: admin@deiaz.com DEI3283 DUAL ARINC 429 LINE RECEIVER FEATURES • • • • • • • • • • Two separate analog receiver channels
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DEI3283
/-200V
MIL-STD-883B
RM3283
RM3183
HI-8482
DEI3283-CMB-G
DEI3283-CMS
DEI3283-CMS-G
DEI3283-SAB-G
SE 135
DEI3283-EMS
DEI3283
DEI3283-SES
A429
HI-8482
direct replacement
M1015
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PDF
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INTERFACE TECHNOLOGY ARINC 429
Abstract: Device Engineering
Text: Device Engineering Incorporated 385 East Alamo Drive Chandler, AZ 85225 Phone: 480 303-0822 Fax: (480) 303-0824 E-mail: admin@deiaz.com DEI3283 DUAL ARINC 429 LINE RECEIVER FEATURES • • • • • • • • • • Two separate analog receiver channels
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DEI3283
/-200V
MIL-STD-883B
RM3283
RM3183
HI-8482
DS-MW-03283-01
INTERFACE TECHNOLOGY ARINC 429
Device Engineering
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PDF
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HI-8482CM-01
Abstract: HI-8482 HI-8482PSI HI-6010 HI-8482J HI-8482JT HI-8482PST HI-8683 RM3183 DS8482
Text: HI-8482 ARINC 429 DUAL LINE RECEIVER OUT2A - 8 The HI-8482 line receiver is one of several options offered by Holt Integrated Circuits to interface to the ARINC bus. The digital data processing for serial-to-parallel conversion and clock recovery can be accomplished with the
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Original
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HI-8482
HI-8482
HI-6010,
HI-8683
20-PIN
HI-8482CM-01
HI-8482PSI
HI-6010
HI-8482J
HI-8482JT
HI-8482PST
RM3183
DS8482
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PDF
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HI-8482
Abstract: No abstract text available
Text: HI-8482 ARINC 429 DUAL LINE RECEIVER The self-test inputs force the outputs to either a ZERO, ONE, or NULL state for system tests. While in self-test mode, the ARINC inputs are ignored. IN2B - 4 OUT2B - 5 IN2A - 6 CAP2A - 7 OUT2A - 8 All the ARINC inputs have built-in hysteresis to reject
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HI-8482
HI-8482
RM3183.
20-PIN
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Untitled
Abstract: No abstract text available
Text: Raytheon Electronics Semiconductor Division RM3183 D ual A R IN C 4 2 9 Lin e R e c e iv e r clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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RM3183
Mil-Std-883B
20-pin
DS30003183
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PDF
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RM3183D
Abstract: raytheon 03-19 1/RM3183D Thomson capacitors lcc
Text: Preliminary Product Specifications Linear Integrated Circuits_ RM3183 Raytheon ^,< > v V *.7 C S 1 •vir«*» H i! N t ¿60AR RAROS, t O * * ptwne pt« 3r<» PAX 3i«)378-ift* RM3183 Dual ARINC 429 Line Receiver Features ■ ■ ■ ■ ■ ■ ■
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RM3183
378-ift*
Mil-Std-883B
RM3183
RM3182
20-Lead
7/90-S-5M
RM3183D
raytheon 03-19
1/RM3183D
Thomson capacitors lcc
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PDF
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R w w w .fa irc h ild s e m i.c o m tm RM3183 Dual ARINC 429 Line Recei ver Features • • • • • • • • clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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OCR Scan
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RM3183
Mil-Std-883B
20-pin
DS30003183
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PDF
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EF4442
Abstract: RM3183S LN1B RM3182 RM3183 RM3183L
Text: FAIRCHILD S E M IC O N D U C T O R www.fairchildsemi.com tm RM3183 Dual A R IN C 429 Line R e c e i v e r clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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OCR Scan
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RM3183
Mil-Std-883B
20-pin
RM3183
DS30003183
EF4442
RM3183S
LN1B
RM3182
RM3183L
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PDF
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Untitled
Abstract: No abstract text available
Text: RM3183 RM3183 Dual ARINC 429 Line Receiver Description The RM3183 is a dual line receiver designed to meet all requirements of the ARINC 429 interface specification. It contains two independent receiver channels which accept differential input signals and converts then to
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RM3183
RM3183
RM3182
RM3182
j75pF
EF4442
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PDF
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Thomson capacitors lcc
Abstract: No abstract text available
Text: RM3183 RM3183 Dual ARINC 429 Line Receiver Description The Raytheon RM3183 line receiver is the companion The RM3183 is a dual line receiver designed to meet all requirements of the ARINC 429 interface specification. It the analog functions needed for the ARINC 429
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RM3183
RM3183
RM31S2
Thomson capacitors lcc
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PDF
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Untitled
Abstract: No abstract text available
Text: F A IR C H IL D S E M IC O N D U C T O R www.fairchildsemi.com tm RM3183 Dual ARINC 429 Line Receiver clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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OCR Scan
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RM3183
Mil-Std-883B
20-pin
DS30003183
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PDF
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Untitled
Abstract: No abstract text available
Text: F A IR C H IL D S E M IC O N D U C T O R www.fairchildsemi.com tm RM3183 Dual ARINC 429 Line Receiver clamping diodes. Self-test logic inputs are provided for internal system tests. These inputs force the outputs to either a high, a low, or a null state for off-line system tests.
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OCR Scan
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RM3183
Mil-Std-883B
20-pin
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PDF
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HI-8482
Abstract: No abstract text available
Text: HI-8482 HOLE INTEGRATED CIRCUITS ARINC 429 DUAL LINE RECEIVER PIN CONFIGURATIONS GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS de vice designed as a dual line receiver in accordance with the requirements of the ARINC 429 bus specification. It
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HI-8482
HI-8482
RM3183.
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PDF
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H1848
Abstract: No abstract text available
Text: HOLT, HI-8482 INTEGRATED CIRCUITS ARINC 429 DUAL LINE RECEIVER PIN CONFIGURATIONS GENERAL DESCRIPTION The HI-8482 bus interface unit is a silicon gate CMOS de vice designed as a dual line receiver in accordance with the requirements of the ARINC 429 bus specification. It
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HI-8482
HI-8482
theRM3183.
20-PIN
H1848
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PDF
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