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Catalog Datasheet	MFG & Type	Document Tags	PDF
DF0001 Abstract: RGB624 Text: RGB624/RGB624DB D.O PLL Compatibility Programming REF DIV COUNT R e fe re n c e D ivide C o u n t This The RG B51x and RGB52x products all have a program mable P L L for generating a pixel clock, and the RG B524 and RG B528 have a second P L L for driving a "S Y S C L K "	OCR Scan	RGB624/RGB624DB RGB52x RGB51x/RGB52x" B624/RG B624D RGB624/RG 0x0014) DF0001 RGB624	PDF
Untitled Abstract: No abstract text available Text: RGB624/RGB624DB 1.0 Microprocessor Access As seen on th e m icroprocessor bus th e re are eight I/O addresses, selected by RS[2:0]. Two indirect schemes are used to access all of th e in te rn a l registers and arrays through th ese eight prim ary I/O addresses.	OCR Scan	RGB624/RGB624DB 256x8	PDF
a6ke Abstract: a40V c2bl B60V coy 11 Text: RGB624/RGB624DB 6.0 6 Bit Linear Palette Output The 6 B IT LI N 6 bit linear b it of the Palette Control register affects the form at of RGB color data read from the palettes and presented to the DACs in indirect color mode. It only has effect when th e color resolution is set	OCR Scan	RGB624/RGB624DB a6ke a40V c2bl B60V coy 11	PDF
RGB524 Abstract: RGB526/RGB526DB Text: RGB526/RGB526DB 1.0 Microprocessor Access As seen on th e m icroprocessor bus th e re are eight I/O addresses, selected by RS[2:0]. Two indirect schemes are used to access all of th e in te rn a l registers and arrays through th ese eight prim ary I/O addresses.	OCR Scan	RGB526/RGB526DB 256x8 RGB524 RGB526/RGB526DB	PDF
RGB624 Abstract: cursor Text: RGB624/RGB624DB 9.0 Controls 9.1 Blank and Border Control The B L A N K and B O R DER/O E signals control the way in which data is presented to the DACs. These control signals are used to determ ine when pixel data is valid, when the border color is to be displayed, where the cur	OCR Scan	RGB624/RGB624DB RGB526/RGB526DB RGB51x RGB52x RGB624 cursor	PDF
d2222 Abstract: No abstract text available Text: RGB526/RGB526DB C.O R EF DIV COUNT R eferen ce D iv id e C ount This num ber provides a count value for dividing down th e incoming REFCLK. It m u st be betw een 2 and 31. O peration of th e PLL is indeterm inate if th is num ber is 0 or 1. PLL Compatibility	OCR Scan	RGB526/RGB526DB RGB51x RGB52x RGB524 RGB528 RGB526/RGB526DB d2222	PDF
0x0016 Abstract: No abstract text available Text: RGB526/RGB526DB 2.0 Clocking 2.1 Clock Generators There are two on-board clock generators: pixel clock and system clock SYSCLK . Each clock generator uses a sep arate program m able phase locked loop (PLL). This causes th e SYSCLK s ta rt up frequency to be	OCR Scan	RGB526/RGB526DB 0x008e 0x008f 0x008c 0x008d 0x0016	PDF
RGB624 Abstract: C2-M3 Text: RGB624/RGB624DB 2.0 Clocking 2.1 Clock Generators T h ere are tw o on-board clock generators: p ixe l clock and system clock SYSC LK . Each clock g e n e ra to r uses a separate p ro gram m able phase locked loop (P LL). T h is causes th e S Y S C LK s ta rt up frequency to be	OCR Scan	RGB624/RGB624DB 0x008e 0x008c 0x008d RGB624 C2-M3	PDF