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    54F10

    Abstract: 74F10 F113
    Text: NATIONAL SEMICOND -CLOGIO IDE D | bSDIISS Q0b711S T | T ~ ^ f e - 0 7 - 0 7 VWA National Æüà Semiconductor " 54F/74F113 Dual JK Negative Edge-Triggered Flip-Flop General Description The ’F113 offers individual J, K, Set and Clock inputs. When the clock goes HIGH the inputs are enabled and data may


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    bSD1122 00b711S 54F/74F113 54F10 74F10 F113 PDF