PAL32VX10
Abstract: PAL32VX10C
Text: High Speed Programmable Array Logic PAL32VX1O PAL32VX10A Ordering Information Features/B enefits • Dual independent feedback paths allow buried state registers or input registers PAL32VX10A C NS STD • Program m able flip-flops allow J-K, S-R , T or D types for the
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24-pin
300-m
PAL32VX10
PAL32VX10C
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Monolithic Memories
Abstract: 32vx10 palasm PAL32VX10 SSI MSI macrocell
Text: High Speed Programmable Array Logic P A L3 2 V X 1 0 M onolithic s i a M e m o rie s P A L3 2 V X 1 0 A U.S. Patent 4124899 / / / / / / / //////////////////////////////////////ADVANCE INFORMATION Features/ Benefits Logic Symbol • 10 input/output macrocells
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PAL32VX10
PAL32VX1
22V10
PAL32VX1OA
Monolithic Memories
32vx10
palasm
SSI MSI macrocell
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Untitled
Abstract: No abstract text available
Text: High Speed Programmable Array Logic PAL32VX10 PAL32VX10A Ordering Information Features/ Benefits • Dual independent feedback paths allow buried state registers or input registers • Programm able flip-flops allow J-K , S-R, T or D types for the most efficient use of product terms
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PAL32VX10
PAL32VX10A
PAL32VX10A
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