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    N74LS Search Results

    N74LS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74LS490N Rochester Electronics LLC Decade Counter, LS Series, Asynchronous, Negative Edge Triggered, 4-Bit, Up Direction, TTL, PDIP16, PLASTIC, DIP-16 Visit Rochester Electronics LLC Buy
    SN74LS04DG4 Texas Instruments Hex inverters 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS05D Texas Instruments Hex inverters with open collector outputs 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS05N Texas Instruments Hex inverters with open collector outputs 14-PDIP 0 to 70 Visit Texas Instruments Buy
    SN74LS06DG4 Texas Instruments Hex inverter buffers / drivers with high-voltage outputs 14-SOIC 0 to 70 Visit Texas Instruments Buy
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    N74LS Price and Stock

    Texas Instruments SN74LS166ADR

    IC SHFT REG PAR-LD 8BIT 16-SOIC
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    DigiKey SN74LS166ADR Cut Tape 18,438 1
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    SN74LS166ADR Digi-Reel 18,438 1
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    Texas Instruments SN74LS06DBR

    IC INVERTER 6CH 1-INP 14SSOP
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    Mouser Electronics SN74LS06DBR 19,093
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    Win Source Electronics SN74LS06DBR 3,800
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    Texas Instruments SN74LS125ADR

    IC BUF NON-INVERT 5.25V 14SOIC
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    Ameya Holding Limited SN74LS125ADR 2,500
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    ComSIT USA SN74LS125ADR 2,400
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    Texas Instruments SN74LS126ANSR

    IC BUF NON-INVERT 5.25V 14SOP
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    DigiKey SN74LS126ANSR Cut Tape 1,988 1
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    SN74LS126ANSR Digi-Reel 1,988 1
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    Texas Instruments SN74LS393NSR

    IC BINARY COUNTER DL 4BIT 14SO
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    N74LS Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    N74LS00 Unknown TTL Data Book 1980 Scan PDF
    N74LS00A Unknown TTL Data Book 1980 Scan PDF
    N74LS00D Signetics Quad 2-INPUT NAND Gate Scan PDF
    N74LS00D Signetics Quad Two-Input NAND Gate Scan PDF
    N74LS00F Signetics Quad Two-Input NAND Gate Scan PDF
    N74LS00N Signetics Quad Two-Input NAND Gate Scan PDF
    N74LS00N Signetics Quad 2-INPUT NAND Gate Scan PDF
    N74LS00N Signetics Quad Two-Input NAND Gate Scan PDF
    N74LS00N Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    N74LS01 Unknown TTL Data Book 1980 Scan PDF
    N74LS01A Unknown TTL Data Book 1980 Scan PDF
    N74LS01D Signetics Quad Two Input NAND Gate Original PDF
    N74LS01D Signetics Quad Two-Input NAND Gate (Open Collector) Scan PDF
    N74LS01F Signetics Quad Two-Input NAND Gate (Open Collector) Scan PDF
    N74LS01N Signetics Quad Two Input NAND Gate Original PDF
    N74LS01N Signetics Quad Two-Input NAND Gate (Open Collector) Scan PDF
    N74LS01N Signetics Quad Two-Input NAND Gate (Open Collector) Scan PDF
    N74LS01N Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    N74LS02 Unknown TTL Data Book 1980 Scan PDF
    N74LS02A Unknown TTL Data Book 1980 Scan PDF
    ...

    N74LS Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    sr flip flop

    Abstract: DN74LS113 MA161
    Text: N74LS113 LS TTL N74LS Series D N 7 4 L S 1 1 3 ^ 7 ^ U S 3 Dual J-K Negative Edge-Triggered F lip -F lo p s with Set) • Description P-l D N74LS113 contains tw o negative-edge triggered J-K flip­ flop circuits, each w ith independent clock-CP, J, K, and


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    DN74LS DN74LS113 DN74LS113 14-pin S0-140) MA161. trS15ns, sr flip flop MA161 PDF

    8253/8254

    Abstract: md 8243 ITT301 6168 sc 8254 AA lt 8239 signetics B197 B236 B237
    Text: Signetics Integrated C ircuits-Lo w Power Schottky T T L TYPE NO. d e s c r ip t io n STO C K NO. N74LS 260N N 74LS261N N74LS266N Dual 5 -In p u t NO R Gate M u ltip ly Decoder Quad Exclusive NOR 5S 735A 55 7 3 6 X 5 57 37H O U T L IN E DRW G. NO. 1 2 1 M 74LS273N


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    N74LS260N 5735A N74LS261N 55736X N74LS266N 5S737H M74LS273N 55738F M74LS279N N74LS283N 8253/8254 md 8243 ITT301 6168 sc 8254 AA lt 8239 signetics B197 B236 B237 PDF

    Untitled

    Abstract: No abstract text available
    Text: LS TTL N74LS Series N74LS373 N74LS373 Octal D-type Transparent L a t c h e s w ith 3 -sta te Outputs • Description P-3 D N74LS373 contains eight 3-state o u tp u t D-type latch circuits w ith com m on outp u t-control enable inputs for all circuits.


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    DN74LS DN74LS373 N74LS373 20-pin PDF

    74LS386

    Abstract: N74LS386F N74LS386N S54LS386F S54LS386W
    Text: 54LS/74LS386 ORDERING CODE PACKAGES PIN CONFIGURATION See Section 9 for further Package and Ordering Information C O M M E R C IA L RANGES ± 5%' t A = ° ° c *0 *70°c PIN CO N F. VCC = s v P lastic DIP Fig. A N74LS386N C eram ic DIP Fig. A N 74LS386F


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    54LS/74LS386 N74LS386N N74LS386F S54LS386F S54LS386W 54H/74H 54S/74S 54LS/74LS 54H/74H 54S/74S 74LS386 N74LS386N S54LS386F S54LS386W PDF

    Untitled

    Abstract: No abstract text available
    Text: 54/7412 54LS/74LS12 ORDERING CODE PACKAGES PIN C O N F. PIN CONFIGURATION See Section 9 for further Package and Ordering Information. C O M M ERCIAL R A N G ES =5V ±5%; T a =0“C to *70"C VC C Plastic D IP Fig. A N7412N N74LS12N Ceramic D IP Fig. A


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    54LS/74LS12 N7412N N7412F N74LS12F N74LS12N S5412F S5412W S54LS12W 54H/74H 54LS/74LS PDF

    DN74LS245

    Abstract: No abstract text available
    Text: N74LS245 LS TTL N74LS Series N74LS245 Octal Bus T ra n sceiv ers with 3 -s ta te Outputs H Description P-3 D N74LS245 contains eight bus transm itter/reciver circuits w ith non-inverted o utputs. /V • Features • • • • • Bidirectional transfer or separation capability for tw o 8-bit


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    DN74LS DN74LS245 DN74LS245 400mV -15mA) 20-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: LS TTL N74LS Series N74LS109 D N 7 4 L S 1 0 9 Dual J-K Positive Edge-Triggered F lip-F lops with S et and Reset • Description P-2 D N74LS109 contains two positive-edge triggered J-K flipflop circuits, each w ith independent clock-CP, J, K, and direct-coupled set and reset input terminals.


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    DN74LS DN74LS109 N74LS109 MA161 PDF

    Untitled

    Abstract: No abstract text available
    Text: L .o T T L N74LS08 D N 7 4 L 3 O e r ie s N74LS08 131074^? Quad 2 - input P o sitiv e AND Gates I Description P-1 D N74LS08 contains four 2-input positive isolation AND gate circuits. • Features • • • • Low power consum ption Pd = 17mW typical


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    DN74LS08 DN74LS08 N74LS08 14-pin SO-14D) PDF

    74ls86n

    Abstract: 74ls138n 74LS155N 74ls173n 74LS153N 74LS75N CD 8227 IC TTL 74LS153N 74LS158N 74LS161N
    Text: S ig n e tic s Integrated C ircuits - Low Power S chottky T T L R EFERENCE T A B L E TYPE NO. D E S C R IP T IO N STOCK NO. N 7 4LS 51N N 7 4LS 54N N74LS 55N N 7 4LS 73N N 7 4LS 74N D u a l 2 -W id e 2 - I n p u t A O I G a te 4 -W id e 2 - I n p u t A O I G ate


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    n74ls51n 55673h n74ls54n 55674f n74ls55n 55675d n74ls73n 55676b n74ls74n 55677x 74ls86n 74ls138n 74LS155N 74ls173n 74LS153N 74LS75N CD 8227 IC TTL 74LS153N 74LS158N 74LS161N PDF

    74LS08 fan-out

    Abstract: 74LS08 pin configuration pin configuration 74LS08 74LS 7408 7408 7408 and 7408 pin configuration specification of 74ls08 S-5408 N7408F
    Text: PIN C O N F IG U R A T IO N S 54/7408 54H/74H08 54S/74S08 54LS/74LS08 ORDERING CODE I GE See Section 9 for further Package and Ordering Information. PIN CONF. P lastic DIP Fig. A Fig. A N7408N N74S08N • • N74H08N N74LS08N C era m ic DIP Fig. A Fig. A


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    54H/74H08 54S/74S08 54LS/74LS08 N7408N N74H08N N74S08N N74LS08N N7408F N74H08F N74S08F 74LS08 fan-out 74LS08 pin configuration pin configuration 74LS08 74LS 7408 7408 7408 and 7408 pin configuration specification of 74ls08 S-5408 N7408F PDF

    74ls characteristics

    Abstract: 74LS279 S5427 74279 truth table NOT gate 74 N74279F N74279N N74LS279F N74LS279N S54279F
    Text: PIN CONFIGURATION 54/74279 54LS/74LS279 ORDERING CODE PIN CONF. PACKAGES See Section 9 for further Package and Ordering Information. C O M M ER C IA L RANGES = + 5%; T a = 0 -C to *70"C VCC Plastic DIP Fig. A N74279N N74LS279N C eram ic DIP Fig. A N74279F


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    54LS/74LS279 N74279N N74LS279N N74279F N74LS279F S54279F S54LS279F S54279W S54LS279W 54H/74H 74ls characteristics 74LS279 S5427 74279 truth table NOT gate 74 N74279F N74279N N74LS279N S54279F PDF

    Untitled

    Abstract: No abstract text available
    Text: I LS T T L N74LS Series N74LS74A N74LS74A Dual D -type P o sitiv e E dge-triggered F lip -F lo p s w ith S e t and R eset • Description P-1 D N74LS74A contains tw o positive-edge triggered D-type flip-flop circuits, each w ith independent clock-CP data-D,


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    DN74LS DN74LS74A 14-pin SO-14D) PDF

    ma161

    Abstract: No abstract text available
    Text: LS TTL N74LS Series N74LS112 N74LS112 Dual J-K Negative Edge-Triggered F lip-F lops with S et and Reset • P-2 Description D N74LS112 contains two negative-edge triggered J-K flip­ flop circuits, each w ith independent clock-CP, J , K, and direct-coupled set and reset in p u t term inals.


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    DN74LS DN74LS112 16-ptn 16-pin S0-160) ma161 PDF

    7404 NOT ic

    Abstract: 7404 7404 ic pin configuration 74LS 7404 IC TTL 7404 7404 ic IC 7404 INVERTER ic 7404 maximum current IC 7404 hex inverter 7404 pin configuration
    Text: 7404, LS04, S04 Signetics Inverters Hex Inverter Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7404 10ns 12mA 74LS04 9.5ns 2.4mA 74S04 3ns 22mA ORDERING CODE COMMERCIAL RANGE PACKAGES Plastic DIP N7404N, N74LS04N, N74S04N


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    74LS04 74S04 N7404N, N74LS04N, N74S04N N74LS04D, N74S04D F07S70S 7404 NOT ic 7404 7404 ic pin configuration 74LS 7404 IC TTL 7404 7404 ic IC 7404 INVERTER ic 7404 maximum current IC 7404 hex inverter 7404 pin configuration PDF

    Untitled

    Abstract: No abstract text available
    Text: LS TTL N74LS Series N74LS83A N74LS83A \J la i s *3 r\ 4 -b it Binary Full Adders (with F ast Carry • Description P-2 D N74LS83 A is a 4-bit full-adder w ith a “ look-ahead” carry. ■ • • • Features “ Look-ahead” carry for high speed Partial “look-ahead” carry for system capability


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    DN74LS DN74LS83A N74LS83 16-pin SO-16D) PDF

    Untitled

    Abstract: No abstract text available
    Text: I LS TTL N74LS Series N74LS153 N74LS153 Dual 4 -lin e to 1 -lin e Data Selectors / Multiplexers • Description P-2 D N74LS153 contains tw o 4-line to 1-line data selector/ m ultiplexer circuits. ■ Features • • • • Independent enable input for each circuit


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    DN74LS DN74LS153 N74LS153 IC20- IC30- PDF

    74LS386

    Abstract: No abstract text available
    Text: 54LS/74LS386 ORDERING CODE PIN C O N F. PACKAGES PIN CONFIGURATION See Section 9 for further Package and Ordering Information M ILITA R Y RANGES C O M M E R C IA L RANGES VCC = 5V 1 5%; Ta = 0°C lo *70°C Plastic DIP Fig. A N74LS386N Ceramic DIP Fig. A


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    54LS/74LS386 N74LS386N N74LS386F S54LS386F S54LS386W 54S/74S 54LS/74LS 54LS/74LS 54H/74H, 74LS386 PDF

    DN74LS390

    Abstract: LS290 LS90 MA161
    Text: I LS TTL N74LS Series N74LS390 N74LS390 Dual Decade Counters • Description P -2 D N74LS390 contains tw o asynchronous decade counter circuits w ith direct-coupled reset inputs. ■ Features • Includes tw o circuits corresponding to LS90 and LS290 for


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    DN74LS DN74LS390 DN74LS390 LS290 35MHz 16-pin 50ohms. LS90 MA161 PDF

    74L5

    Abstract: No abstract text available
    Text: 74LS197 Signetics Counter Presettable 4-Bit Binary Ripple Counter Product Specification Logic Products FEATURES TYPE PIN CONFIGURATION 16mA COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to + 70”C PACKAGES Plastic DIP N74LS197N Plastic SO-14 N74LS197D NOTE: For information regarding devices processed to Military Specifications, see the Signetics Military Products


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    74LS197 40MHz N74LS197N N74LS197D 1N916, 1N3064, 500ns 500ns 74L5 PDF

    400M

    Abstract: DN74LS155 MA161
    Text: LS TTL N74LS Series D N 7 4 L S 1 5 5 i\j N74LS155 74- 15 5 Dual 2-line to 4-line Decoders/ Demultiplexers • Description P-2 D N74LS155 contains tw o 2-bit binary decoder/dem ultiplexer circuits. to quarternary ■ Features • • • • Low o u tp u t im pedance


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    DN74LS DN74LS155 DN74LS155 16-pin SO-16D) 03-line 400M MA161 PDF

    400M

    Abstract: DN74LS74A MA161
    Text: I LS T T L N74LS Series N74LS74A N74LS74A Dual D -type P o sitiv e E dge-triggered F lip -F lo p s w ith S e t and R eset • Description P-1 D N74LS74A contains tw o positive-edge triggered D-type flip-flop circuits, each w ith independent clock-CP data-D,


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    DN74LS DN74LS74A DN74LS74A 14-pin SO-14D) 400M MA161 PDF

    S54LS30F

    Abstract: 74LS30 N7430F N7430N N74H30F N74H30N N74LS30F N74LS30N S5430F S54H30F
    Text: PIN CONFIGURATIONS 54/7430 54H/74H30 54LS/74LS30 ORDERING CODE See Section 9 for further Package and Ordering Information. C O M M E R C IA L RANGES “ 5V - 5%; T A = 0°C to *70°C PACKAGES PIN CON F. P lastic DIP Fig. A Fig. A N7430N N74H30N N74LS30N


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    54H/74H30 54LS/74LS30 N7430N N74H30N N74LS30N N7430F N74H30F N74LS30F S5430F S54H30F S54LS30F 74LS30 N7430F N7430N N74LS30N S5430F PDF

    N7409F

    Abstract: N7409N N74LS09F N74LS09N N74S09F N74S09N S5409F S54LS09F S54S09F
    Text: 54/7409 54S/74S09 54LS/74LS09 ORDERING CODE PIN CONFIGURATION See Section 9 for further Package and Ordering Information. C O M M ER C IA L RANGES ± 5%; T a = 0 "C to *70°C PACKAGES PIN C O N F. P lastic DIP Fig. A Fig. A N7409N N74S09N N74LS09N C eram ic DIP


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    54S/74S09 54LS/74LS09 N7409N N74S09N N74LS09N N7409F N74S09F N74LS09F S5409F S54S09F N7409F N7409N N74LS09N S5409F S54LS09F PDF

    N7401F

    Abstract: N7401N N74H01F N74H01N N74LS01F N74LS01N S5401F S54H01F S54LS01F 74H01
    Text: PIN CONFIGURATIONS 54/7401 54H/74H01 54LS/74LS01 ORDERING CODE See Section 9 for further Package and Ordering Information. C O M M ER C IA L RANGES VCc = sv ± 5%; T A = 0 ° C Io »7 0 °C PACKAGES PIN CONF. P lastic DIP Fig. A Fig. C N7401N N74LS01N


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    54H/74H01 54LS/74LS01 N7401N N74LS01N N74H01N N7401F N74LS01F N74H01F S5401F S54LS01F N7401F N7401N N74H01N S5401F S54H01F 74H01 PDF