Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    MX10E8050IUC Search Results

    MX10E8050IUC Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Type PDF
    MX10E8050IUC Macronix International On-chip Flash program memory with in-system programming Original PDF

    MX10E8050IUC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MX10E8050IQCG

    Abstract: MX10E8050IQC
    Text: MX10E8050I / MX10E8050IA Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC MX10E8050IUC 44 Pin PDIP 6 UART YES MX10E8050IPCG 44 Pin PLCC 44 Pin LQFP MX10E8050IQCG MX10E8050IUCG MX10E8050IAQC 6 I2C YES 44 Pin PLCC


    Original     		PDF MX10E8050I MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050IPCG MX10E8050IQCG MX10E8050IUCG MX10E8050IAQC MX10E8050IAQCG

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY MX10E8050I Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 40 Pin PDIP x6 x 12 UART MX10E8050IUC P/N:PM0887 YES 44 Pin PLCC 44 Pin LQFP Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.5, JUL. 29, 2004


    Original     		PDF MX10E8050I MX10E8050IPC MX10E8050IQC MX10E8050IUC PM0887 80C51 40MHz 20MHz

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY MX10E8050I MX10E8050X MX10E8050IA Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 40 Pin PDIP x 12 UART YES 44 Pin PLCC MX10E8050IUC 44 Pin LQFP MX10E8050XPC 40 Pin PDIP MX10E8050XQC x 6 NO NO MX10E8050XUC


    Original     		PDF MX10E8050I MX10E8050X MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050XPC MX10E8050XQC MX10E8050XUC MX10E8050IAQC

    DSCA 114 communication board

    Abstract: MX10E8050IQC BYX 13 400 R
    Text: PRELIMINARY MX10E8050I MX10E8050X Major Difference Product Feature Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 40Pin PDIP x 12 YES YES 44Pin PLCC MX10E8050IUC 44Pin LQFP MX10E8050XPC 40Pin PDIP MX10E8050XQC x6 NO NO MX10E8050XUC P/N:PM0887


    Original     		PDF MX10E8050I MX10E8050X MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050XPC MX10E8050XQC MX10E8050XUC 40Pin 44Pin DSCA 114 communication board BYX 13 400 R

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY MX10E8050I MX10E8050X MX10E8050IA Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 40 Pin PDIP x 12 UART YES 44 Pin PLCC MX10E8050IUC 44 Pin LQFP MX10E8050XPC 40 Pin PDIP MX10E8050XQC x 6 NO NO MX10E8050XUC


    Original     		PDF MX10E8050I MX10E8050X MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050XPC MX10E8050XQC MX10E8050XUC MX10E8050IAQC

    MX10E8050IQC

    Abstract: MX10E8050I MX10E8050IA MX10E8050IAQC MX10E8050IPC MX10E8050IUC MX10E8050X mx10e8050iaq MX10E
    Text: PRELIMINARY MX10E8050I MX10E8050X MX10E8050IA Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 40 Pin PDIP x 12 YES YES 44 Pin PLCC MX10E8050IUC 44 Pin LQFP MX10E8050XPC 40 Pin PDIP MX10E8050XQC x 6 NO NO MX10E8050XUC


    Original     		PDF MX10E8050I MX10E8050X MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050XPC MX10E8050XQC MX10E8050XUC MX10E8050IAQC MX10E8050IQC MX10E8050I MX10E8050IA MX10E8050IAQC MX10E8050IPC MX10E8050IUC MX10E8050X mx10e8050iaq MX10E

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY MX10E8050I MX10E8050IA Major Difference Feature Product Default Clock mode ISP IAP MX10E8050IPC 44 Pin PDIP MX10E8050IQC x6 MX10E8050IUC x 12 MX10E8050IAQC x 12 P/N:PM0887 Package UART YES 44 Pin PLCC 44 Pin LQFP I2C YES 44 Pin PLCC Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, DEC. 21, 2004


    Original     		PDF MX10E8050I MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050IAQC PM0887 MX10E8050I 80C51

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY MX10E8050I MX10E8050IA Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 40 Pin PDIP x6 x 12 UART YES MX10E8050IUC MX10E8050IAQC P/N:PM0887 44 Pin PLCC 44 Pin LQFP x 12 I 2C YES 44 Pin PLCC Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, DEC. 03, 2004


    Original     		PDF MX10E8050I MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050IAQC PM0887 MX10E8050I 80C51

    MX10E8050IQC

    Abstract: MX10E8050IUC Kawasaki TCON 15 80C51 MX10E8050I MX10E8050IA MX10E8050IAQC MX10E8050IPC PLCC44
    Text: PRELIMINARY MX10E8050I / MX10E8050IA Major Difference Feature Product Default ISP IAP Package Clock mode MX10E8050IPC MX10E8050IQC 44 Pin PDIP 6 UART YES MX10E8050IUC MX10E8050IAQC P/N:PM0887 44 Pin PLCC 44 Pin LQFP 6 I2C YES 44 Pin PLCC Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, MAR. 28, 2005


    Original     		PDF MX10E8050I MX10E8050IA MX10E8050IPC MX10E8050IQC MX10E8050IUC MX10E8050IAQC PM0887 80C51 MX10E8050IQC MX10E8050IUC Kawasaki TCON 15 MX10E8050IA MX10E8050IAQC MX10E8050IPC PLCC44

    MX10E8050IQC

    Abstract: MX10E8050IUC dsca 125 MX10E8050IPC byx 21
    Text: PRELIMINARY MX10E8050I FEATURES - 80C51 CPU core - 3.0 ~ 3.6V voltage range - On-chip Flash program memory with in-system programming ISP - Operating frequency up to 40MHz - 64K bytes Flash memory for code memory - 1280 bytes internal data RAM - Low power consumption


    Original     		PDF MX10E8050I 80C51 40MHz 16-bit 400kb/s MX10E8050IPC 40pin MX10E8050IQC 44pin MX10E8050IUC MX10E8050IQC MX10E8050IUC dsca 125 MX10E8050IPC byx 21