IDT71V633
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 32 memory configuration Supports high performance system speed Commercial: — 11 11ns Clock-to-Data Access 50 MHz
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Original
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IDT71V633
MT58LC64K32B2LG-XX)
100-pin
100pinTQFP
x4033
IDT71V633
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PDF
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IDT71V633
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ tecture provides cost-effective 2-1-1-1 performance for processors up to 50 MHz. The IDT71V633 SRAM contains write, data-input, address and control
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Original
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IDT71V633
IDT71V633
accepts/9/99
100pinTQFP
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PDF
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IDT71V633
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 32 memory configuration Supports high performance system speed Commercial: — 11 11ns Clock-to-Data Access 50 MHz
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Original
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IDT71V633
MT58LC64K32B2LG-XX)
100-pin
IDT71V633,
x4033
IDT71V633
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PDF
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IDT71V633
Abstract: No abstract text available
Text: PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT Integrated Device Technology, Inc. FEATURES: • 64K x 32 memory configuration • Supports high performance system speed - up to 50 MHz 11 ns Clock-to-Data Access
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Original
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IDT71V633
MT58LC64K32B2LG-XX)
100-pin
IDT71V633
71V633
PK100-1)
71V633S11PF
71V633S12PF
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PDF
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IDT71V633
Abstract: A3780
Text: PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT Integrated Device Technology, Inc. FEATURES: • 64K x 32 memory configuration • Supports high performance system speed - up to 50 MHz 11 ns Clock-to-Data Access
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Original
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IDT71V633
MT58LC64K32B2LG-XX)
100-pin
IDT71V633
71V633
PK100-1)
A3780
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PDF
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pin diagram for core i3 processor
Abstract: No abstract text available
Text: 64K x 32 3.3V Synchronous SRAM Flow-Through Outputs Burst Counter, Single Cycle Deselect IDT71V633 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ 64K x 32 memory configuration Supports high performance system speed Commercial: — 11 11ns Clock-to-Data Access 50 MHz
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Original
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IDT71V633
MT58LC64K32B2LG-XX)
100-pin
100pinTQFP
x4033
pin diagram for core i3 processor
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PDF
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Untitled
Abstract: No abstract text available
Text: ADVANCE M IC R O N 64K X MT58LC64K32B2 32 SYNCBURST SRAM +3.3V SUPPLY, FLOW-THROUGH AND SELECTABLE BURST MODE FEATURES • • • • • • • • • • • • • • PIN ASSIGNMENT Top View Fast access times: 9 ,1 0 ,1 1 ,1 2 and 14ns Fast OE access times: 5 and 6ns
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OCR Scan
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MT58LC64K32B2
100-lead
160-PIN
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PDF
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T58LC
Abstract: No abstract text available
Text: ADVANCE M T58LC 64K 32B 2 6 4 K X 32 S Y N C B U R S T SRAM M IC R O N 64K x 32 SRAM +3.3V SUPPLY, FLOW-THROUGH AND SELECTABLE BURST MODE FEATURES • • • • • • • • • • • • • • F ast access tim es: 9 ,1 0 ,1 1 , 12 an d 14ns Fast O E access tim es: 5 and 6ns
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OCR Scan
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T58LC
100-lead
128ns.
MT58LC64K32B2
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PDF
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Untitled
Abstract: No abstract text available
Text: Integrated Device Technology, Inc. PRELIMINARY 64K x 32, 3.3V SYNCHRONOUS IDT71V633 SRAM WITH FLOW-THROUGH OUTPUTS BURST COUNTER, SINGLE CYCLE DESELECT FEATURES: • 64K x 32 memory configuration • Supports high performance system speed - up to 50 MHz 11 ns Clock-to-Data Access
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OCR Scan
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IDT71V633
MT58LC64K32B2LG-XX)
100-pin
71V633
PK100-1)
71V633S11PF
71V633S12PF
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PDF
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