LVC16823A Search Results

LVC16823A Result Highlights (5)

Part	ECAD Model	Manufacturer	Description	Download	Buy
LVC16823AU		Renesas Electronics Corporation	18 BIT REGISTER W CLEAR
74LVC16823APAG		Renesas Electronics Corporation	18 BIT REGISTER W CLEAR
74LVC16823APVG8		Renesas Electronics Corporation	18 BIT REGISTER W CLEAR
74LVC16823APA		Renesas Electronics Corporation	18 BIT REGISTER W CLEAR
74LVC16823APV		Renesas Electronics Corporation	18 BIT REGISTER W CLEAR

LVC16823A Price and Stock

Filter by Manufacturer


Renesas Electronics Corporation IDT74LVC16823APAG8 IC FF D-TYPE DUAL 9BIT 56TSSOP
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	IDT74LVC16823APAG8	Reel			2,000	1 - 10 - 100 - 1000 - 10000 $1.25159	Buy Now
Integrated Device Technology Inc 74LVC16823APA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Bristol Electronics	74LVC16823APA		34			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Chip 1 Exchange	74LVC16823APA		88			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Integrated Device Technology Inc 74LVC16823AXPV 74LVC16823 - 3.3V CMOS 18-Bit Register '
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	74LVC16823AXPV		425		1	1 $0.4875 10 $0.4875 100 $0.4583 1000 $0.4144 10000 $0.4144	Buy Now
Integrated Device Technology Inc IDT74LVC16823APA INSTOCK
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Chip 1 Exchange	IDT74LVC16823APA		28			1 - 10 - 100 - 1000 - 10000 -	Get Quote

LVC16823A Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: The LVC16823A 18-bit register is built using advanced dual metal CMOS	Original	IDT74LVC16823A 18-BIT LVC16823A	PDF
IDT74LVC16823A Abstract: LVC16823A SO56-2 Text: LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: – – – – – – – – – DESCRIPTION: Typical tSK 0 (Output Skew) < 250ps	Original	IDT74LVC16823A 18-BIT 250ps MIL-STD-883, 200pF, 635mm LVC16823A IDT74LVC16823A SO56-2	PDF
74LVC05 Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14 Text: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed	Original	32-bit, compatibilit-7850 74LVC05 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14	PDF
Untitled Abstract: No abstract text available Text: LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using	Original	IDT74LVC16823A 18-BIT 250ps MIL-STD-883, 200pF, IDT74LVC16823A LVC16823A	PDF
Untitled Abstract: No abstract text available Text: LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using	Original	IDT74LVC16823A 18-BIT 250ps MIL-STD-883, 200pF, IDT74LVC16823A LVC16823A	PDF
DSC-4573 Abstract: IDT74LVC16823A LVC16823A Text: LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using	Original	IDT74LVC16823A 18-BIT 250ps MIL-STD-883, 200pF, LVC16823A DSC-4573 IDT74LVC16823A	PDF
IDT74LVC16823A Abstract: LVC16823A Text: LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE LVC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using	Original	IDT74LVC16823A 18-BIT 250ps MIL-STD-883, 200pF, LVC16823A IDT74LVC16823A	PDF
Untitled Abstract: No abstract text available Text: 3.3 V CMOS 18-BIT REGISTER 3-STATE , 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - LVC16823A ADVANCE INFORMATION The LVC16823A18-bit edge-triggered D-type register is built using advanced dual metal CMOS technology.This high-speed, low-power register is ideal for use as a buffer register for data	OCR Scan	18-BIT IDT74LVC16823A LVC16823A18-bit 18-bit LVC16823A	PDF
Untitled Abstract: No abstract text available Text: 3.3 V CMOS 18-BIT REGISTER 3-STATE , 5 VOLT TOLERANT I/O jd t LVC16823A ADVANCE INFORMATION Integrated D ev ice Ife ch n o ljg y , l i e . DESCRIPTION: FEATURES: - The LVC16823A18-bit edge-triggered D-type register is built using advanced dual metal CMOS technology. This high-speed,	OCR Scan	18-BIT IDT74LVC16823A 250ps MIL-STD-883, 200pF, 635mm LVC16823A18-bit tPHL11	PDF
Untitled Abstract: No abstract text available Text: 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O BE FEATURES: - Typical tsK o (Output Skew) < 250ps - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) - 0.635mm pitch SSOP, 0.50mm pitch TSSOP and 0.40mm pitch TVSOP packages	OCR Scan	18-BIT 250ps MIL-STD-883, 200pF, 635mm LVC16823A: VC16823A LVC16823A18-bit 2975StenderWay	PDF
Untitled Abstract: No abstract text available Text: ID T74L VC16823A 3.3V CMOS 18-BIT REGISTER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O FEATURES: - D E S C R IP TIO N : Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP	OCR Scan	18-BIT 250ps MIL-STD-883, 200pF, 635mm VC16823A LVC16823A18-bit 2975StenderW	PDF
Untitled Abstract: No abstract text available Text: FEATU RES: DESCRIPTION: - Typical tsK o (Output Skew) < 250ps - - ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP and 0.40mm pitch TVSOP packages Extended commercial range of -40°C to +85°C	OCR Scan	250ps MIL-STD-883, 200pF, 635mm LVC16823A: LVC16823A18-bit S056-1) S056-2) S056-3) 18-Bit	PDF