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    LS107 Search Results

    LS107 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74LS107AN Texas Instruments Dual J-K Flip-Flops With Clear 14-PDIP 0 to 70 Visit Texas Instruments Buy
    SN74LS107AD Texas Instruments Dual J-K Flip-Flops With Clear 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS107ANSR Texas Instruments Dual J-K Flip-Flops With Clear 14-SO 0 to 70 Visit Texas Instruments Buy
    74LS107AP-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS107AFPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
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    LS107 Price and Stock

    Rochester Electronics LLC SN74LS107AD

    SN74LS107A Dual J-K Flip-Flops W
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74LS107AD Bulk 18,672 261
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    • 1000 $1.15
    • 10000 $1.15
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    Rochester Electronics LLC SN74LS107ANS

    JK TYPE NEG TRG DUAL 14SO
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74LS107ANS Bulk 6,168 247
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    • 1000 $1.22
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    Taiwan Semiconductor HDBLS107G

    BRIDGE RECT 1PHASE 1KV 1A DBLS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey HDBLS107G Reel 3,000 1,500
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    • 10000 $0.2907
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    Avnet Americas HDBLS107G Reel 3,000
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    • 10000 $0.29422
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    Mouser Electronics HDBLS107G
    • 1 $0.8
    • 10 $0.699
    • 100 $0.484
    • 1000 $0.372
    • 10000 $0.269
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    Taiwan Semiconductor DBLS107GH

    BRIDGE RECT 1PHASE 1KV 1A DBLS
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey DBLS107GH Reel 3,000 1,500
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    • 10000 $0.19202
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    Mouser Electronics DBLS107GH
    • 1 $0.59
    • 10 $0.512
    • 100 $0.356
    • 1000 $0.25
    • 10000 $0.178
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    Taiwan Semiconductor HDBLS107GH

    75NS, 1A, 1000V, HIGH EFFICIENT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey HDBLS107GH Reel 3,000 1,500
    • 1 -
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    • 100 -
    • 1000 -
    • 10000 $0.2907
    		Buy Now
    Avnet Americas HDBLS107GH Reel 3,000
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $0.29422
    		Buy Now
    Mouser Electronics HDBLS107GH
    • 1 $0.8
    • 10 $0.699
    • 100 $0.484
    • 1000 $0.372
    • 10000 $0.269
    		Get Quote
    Find more LS107 price and stock on Findchips.com

    LS107 Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Type PDF
    LS107T Unknown Shortform IC and Component Datasheets (Plus Cross Reference Data) Scan PDF
    LS107TB Unknown Shortform IC and Component Datasheets (Plus Cross Reference Data) Scan PDF

    LS107 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    LS107

    Abstract: HC107 DL129 HC73 MC74HC107 MC74HCXXXD MC74HCXXXN
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74HC107 Dual J-K Flip-Flop with Reset High–Performance Silicon–Gate CMOS The MC74HC107 is identical in pinout to the LS107. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are


    Original     		PDF MC74HC107 MC74HC107 LS107. HC107 DL129 MC74HC107/D* MC74HC107/D LS107 HC73 MC74HCXXXD MC74HCXXXN

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C74HC107 Dual J -K Flip-Flop w ith Reset High-Performance Silicon-Gate CMOS The MC74HC107 is identical in pinout to the LS107. The device inputs are com patible with standard CMOS outputs; with pullup resistors, they are


    OCR Scan     		PDF C74HC107 MC74HC107 LS107. HC107 MC74HC107/D

    Untitled

    Abstract: No abstract text available
    Text: LS73 LS76 LS107 LS112 Dual J-K Negative-Edge-Triggered Flip-Flops LS113 •Pin-for-Pin and functional equivalents to 5473, 5476, 54107, 54S112, 54S113 PIN-OUT DIAGRAMS DESCRIPTION These monolithic dual J-K flip-flops feature individual J, K, clock, and asynchronous preset and clear inputs to each


    OCR Scan     		PDF LS107 LS112 LS113 54S112, 54S113

    Untitled

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C74HC107 Dual J -K Flip-Flop w ith Reset High-Performance Silicon-Gate CMOS The MC74HC107 is identical in pinout to the LS107. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are


    OCR Scan     		PDF MC74HC107 LS107. HC107 DL129 MC74HC107

    74HC107

    Abstract: No abstract text available
    Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC107 Dual J-K Flip-Flop w ith Reset High-Performance Silicon-Gate C M O S The M C 54/74H C 10 7 is id en tica l in p in o u t to the LS107. The device in p u ts are co m p a tib le w ith standard C M O S o u tp u ts ; w ith p u llu p resistors, they are c o m p a tib le


    OCR Scan     		PDF MC54/74HC107 54/74H LS107. HC107 MC54/74HC107 74HC107

    4027B

    Abstract: 4013B hc374 HC-377 HC76 flip-flop HC-107 4027B equivalent hc175 HCT74
    Text: SELECTION GUIDE FLIP-FLOP Type Number M54/74 Functional Equivalent LSTTL 54/74 Function Suggested Alternative LS 54/74 4000B Functional Equivalent CMOS 4000B Package DIP LS73 LS74 LS74 LS76 LS107 4027B 4013B 4013B 4027B 4027B 14 14 14 16 14 Dual J-K FLIP-FLOP with Preset and Clear


    OCR Scan     		PDF M54/74 HCT74 HC107 HC109 HC112 HC113 HC174 HCT174 HC175 HC273 4027B 4013B hc374 HC-377 HC76 flip-flop HC-107 4027B equivalent

    74107 pin diagram

    Abstract: CI 74107 74ls107 pin configuration 74LS107 TTL 74107 2RD22 74107 LS107 1N3064 1N916
    Text: Signetics 74107, LS107 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The ’107 is a dual flip-flop with individual J, K, Clock and direct Reset inputs. The 74107 is a positive pulse-triggered flip­ flop. JK information is loaded into the


    OCR Scan     		PDF LS107 74LS107 1N916, 1N3064, 500ns 74107 pin diagram CI 74107 pin configuration 74LS107 TTL 74107 2RD22 74107 LS107 1N3064 1N916

    IC 74107

    Abstract: IC 74LS107 74LS107 LS107
    Text: Signelics 74107, LS107 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION transferred to the slave on the H IG H -toLO W Clock transition. For these devices TYPICAL f MAX TYPICAL SUPPLY CURRENT TOTAL 74107 20MHz 20mA LS107 45MHz


    OCR Scan     		PDF LS107 1N916, 1N3064, 500ns 500ns IC 74107 IC 74LS107 74LS107 LS107

    pin configuration 74LS107

    Abstract: 74LS107 LS107 LS-107 74107 AN ttl 74107 74107 pin configuration N74107
    Text: 74107, LS107 Signetics Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION The '107 is a dual flip-flop with individual J, K, Clock and direct Reset inputs. The 74107 is a positive pulse-triggered flipflop. JK information is loaded into the


    OCR Scan     		PDF LS107 74LS107 1N916, 1N3064, 500ns 500ns pin configuration 74LS107 LS107 LS-107 74107 AN ttl 74107 74107 pin configuration N74107

    MC54HC107

    Abstract: No abstract text available
    Text: MOTOROLA SEM IC O N D U C TO R TECHNICAL DATA MC54/74HC107 Dual J-K Flip-Flop w ith Reset H ig h -P erfo rm an ce S ilicon-G ate C M O S J SUFFIX CERAMIC CASE 632-08 The M C 54/74H C 10 7 is iden tical m p in o u t to th e LS107. The device in p u ts are c o m p a tib le w ith standard C M O S o u to u ts ; w ith pull up resistors, they are c o m p a tib le


    OCR Scan     		PDF MC54/74HC107 MC54HC107 MC74HC107 LS107. HC107

    LS107

    Abstract: LS112 LS76 LS113 54S112 54S113 LS73 raytheon 74
    Text: LS73 LS76 LS107 LS112 Dual J-K Negative-Edge-Triggered Flip-Flops _ LS113 •Pin-for-Pin and functional equivalents to 5473, 5476, 54107, 54S112, 54S113 P IN -O U T D IA G R A M S DESCRIPTION Th e se m o n o lith ic dual J -K flip -flo p s fe a tu re in d iv id u a l J, K ,


    OCR Scan     		PDF LS107 LS112 LS113 54S112, 54S113 LS112 125-C LS76 LS113 54S112 LS73 raytheon 74

    6367-1

    Abstract: No abstract text available
    Text: LS107A National Semiconductor LS107A/LS107A Dual Negative-EdgeTriggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF LS107A DM54LS107A/DM74LS107A 6367-1

    74107 pin diagram

    Abstract: 74107 74LS107 74107 flip flop H/CI 74107 pin configuration 74LS107 1N3064 1N916 74LS LS107
    Text: 74107, LS107 Signetics Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION Th e '1 0 7 is a dual flip-flop with individual J, K, Clock and direct R eset inputs. The 7 4 1 0 7 Is a positive pulse-triggered flip­ flop. JK information is loaded into the


    OCR Scan     		PDF 74LS107 1N916, 1N3064, 500ns 74107 pin diagram 74107 74107 flip flop H/CI 74107 pin configuration 74LS107 1N3064 1N916 74LS LS107

    IC 74107

    Abstract: H/IC 74107 LS-107 LS107 pin configuration 74LS107
    Text: Signetics 74107, LS107 Flip-Flops Dual J-K Flip-Flop Product Specification Logic Products DESCRIPTION m a s te r w h ile th e C lo c k is H IG H and tra n s fe rre d to th e s la v e o n th e H IG H -to - TYPICAL fMAX TYPICAL SUPPLY CURRENT TOTAL 74107 20MHz


    OCR Scan     		PDF LS107 500ns 500ns IC 74107 H/IC 74107 LS-107 LS107 pin configuration 74LS107

    74107PC

    Abstract: 74ls107 74LS107DC 74107 pin diagram 54LS107DM LS107 54107DM 54107FM 74107DC 74107FC
    Text: 107 C O N N E C T IO N D IA G R A M P IN O U T A 54/74107 '54LS /74LS 107 e> DUAL JK FLIP-FLOP With Separate Clears and Clocks D E S C R IP T IO N — T h e '107 d u a l J K m aster/slave flip -flo p s have a separate c lo c k fo r each flip -flo p . In p u ts to th e m aster se ctio n are c o n tro lle d b y the


    OCR Scan     		PDF 54LS/74LS107 54/74LS CLS107) 74107PC 74ls107 74LS107DC 74107 pin diagram 54LS107DM LS107 54107DM 54107FM 74107DC 74107FC

    74LS115

    Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
    Text: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25


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    Untitled

    Abstract: No abstract text available
    Text: SG60R4 Schottky TTL • Over 180 LS Devices • ALS • FAST TOTAL TTL COMMITMENT «TOTAL • TTL Compatible Macrocell Arrays • RAMs • PROMs General Information TTL in Perspective proved speed — p o w e r product co m p ared to LS as a result o f ad vanced M O S A IC oxide isolated processing.


    OCR Scan     		PDF SG60R4

    SN74ALS123

    Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
    Text: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS


    OCR Scan     		PDF MIL-M-38510 SN74ALS123 SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		PDF 54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76

    mc68701 probug

    Abstract: MC144100 M68KVM02 user manual m6809 EXORCISER motorola MC146805G2 MC1468705G2 AN/mc68701 probug
    Text: Motorola’s Microcomputer Families i Reliability Data Sheets Mechanical Data E Technical Training Memory Products Logic and Special Function Products Development Systems and Board-Level Products E M motorola MICROCOMPUTERS Prepared by Technical Information Center


    OCR Scan     		PDF MM12A 10-Card mc68701 probug MC144100 M68KVM02 user manual m6809 EXORCISER motorola MC146805G2 MC1468705G2 AN/mc68701 probug

    DM74367

    Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
    Text: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,


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    ls307

    Abstract: Ic C 141a LS107
    Text: s g s-thom son d ? e d 752=1537 ODllbSt. 5 H & - / ¿> TS107 LS207 LS 307; 7929225 S G S S E M IC O N D U C T O R C O R P ELECTRICAL CHARACTERISTICS {see note L S 307 L S 107/LS 207 Parameter Unit T est co n d itio n s In p u t offset voltage R g < 10 k i î


    OCR Scan     		PDF LS207 107/LS 141/LS ls307 Ic C 141a LS107

    IC AND GATE 7408 specification sheet

    Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
    Text: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format


    OCR Scan     		PDF

    sn 74373

    Abstract: SN 74114 logic diagram of ic 74112 IC 7486 xor IC 7402, 7404, 7408, 7432, 7400 7486 xor IC sn 74377 IC TTL 7486 xor IC TTL 7495 diagram and truth table IC 74374
    Text: PLS-WS/SN MAX+PLUS II Programmable Logic Software for Sun Workstations Data Sheet September 1991, ver. 1 Features J J □ □ □ J □ IJ Softw are supp ort for Classic, M A X 5000, M A X 7000, and S T G EPLD s Runs on Sun S P A R C s ta tio n s with S u n O S version 4.1.1 or h igher


    OCR Scan     		PDF