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    Text: DDi AVG Semiconductors Technical Data Dual JK Negative Edge-Triggered Flip-Flops with SET, common CLEAR and common CLOCK DV74LS114A DV74ALS114A N Suffix Plastic DIP AVG-001 Case The circuity in this device contains common clock and common clear inputs. When the clock goes HIGH, the inputs are enabled


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    PDF DV74LS114A DV74ALS114A AVG-001 AVG-002 1-800-AVG-SEMI DV74LS114A, LS114A