a1810
Abstract: No abstract text available
Text: Revised January 2003 100LVEL16 3.3V ECL Differential Receiver General Description Features The 100LVEL16 is a low voltage differential receiver that contains an internally supplied voltage source, VBB. When used in a single ended input condition the unused input
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100LVEL16
100LVEL16
a1810
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ALVC162838
Abstract: MTD48 74ALVC162838 74ALVC162838T
Text: Revised November 2001 74ALVC162838 Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26Ω Series Resistors in the Outputs General Description Features The ALVC162838 contains sixteen non-inverting selectable buffered or registered paths. The device can be configured
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74ALVC162838
16-Bit
ALVC162838
PC100
PC133
74ALVC162838
MTD48
74ALVC162838T
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M14A
Abstract: MTC14 74ALVC38 74ALVC38M 74ALVC38MTC
Text: Revised March 2005 74ALVC38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs General Description Features The ALVC38 contains four 2-input NAND gates with open drain outputs. This product is designed for low voltage
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74ALVC38
ALVC38
74ALVC38
M14A
MTC14
74ALVC38M
74ALVC38MTC
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Untitled
Abstract: No abstract text available
Text: Preliminary Revised February 2002 FIN1002 LVDS 1-Bit High Speed Differential Receiver Preliminary General Description Features This single receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100 mV, to LVTTL signal
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FIN1002
FIN1001,
400Mbs
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Untitled
Abstract: No abstract text available
Text: Preliminary Revised October 2001 NC7SP57 • NC7SP58 TinyLogic Universal Configurable 2-Input Logic Gates Preliminary General Description The NC7SP57 and the NC7SP58 are Universal Configurable 2-Input Logic Gates from Fairchild’s Super Low Voltage Series of TinyLogic. Each device is capable of being
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NC7SP57
NC7SP58
NC7SP57
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Untitled
Abstract: No abstract text available
Text: Revised July 2002 FST33X257 24:12 Multiplexer/Demultiplexer Bus Switch General Description Features The Fairchild Switch FST33X257 is a 24:12 high-speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low On Resistance of the switch allows inputs
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FST33X257
FST33X257QSP
FST33X257
FST33X257QSPX
QVSOP-48
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p15v330
Abstract: No abstract text available
Text: Revised March 2005 FSAV330 Low On Resistance Quad SPDT Wide Bandwidth Video Switch General Description Features The Fairchild Video Switch FSAV330 is a quad single pole/ double throw high-speed CMOS TTL-compatible video switch. The low On Resistance of the switch allows inputs
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FSAV330
P15V330
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p15v330
Abstract: No abstract text available
Text: Preliminary Revised December 2001 FSAV330 Low On Resistance Wide Band/Video Quad SPDT Preliminary General Description Features The Fairchild Video Switch FSAV330 is a quad single pole/ double throw high-speed CMOS TTL-compatible video switch. The low On Resistance of the switch allows inputs
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FSAV330
P15V330
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MTC14
Abstract: 74ALVC86 74ALVC86M 74ALVC86MTC 74ALVC86MTCX M14A
Text: Revised March 2005 74ALVC86 Low Voltage Quad 2-Input Exclusive-OR Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC86 contains four 2-input exclusive OR gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V
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74ALVC86
ALVC86
74ALVC86
MTC14
74ALVC86M
74ALVC86MTC
74ALVC86MTCX
M14A
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Untitled
Abstract: No abstract text available
Text: Revised May 2002 FSTU32X384 10-Bit Low Power Bus Switch with −2V Undershoot Protection General Description Features The Fairchild Switch FSTU32X384 provides 20 bits of highspeed CMOS TTL-compatible bus switches. The low On Resistance of the switch allows inputs to be connected to
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FSTU32X384
10-Bit
FSTU32X384
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AN-5008
Abstract: FSTU16862 FSTU16862MTD FSTU16862QSP MTD48
Text: Revised June 2005 FSTU16862 20-Bit Bus Switch with 2V Undershoot Protection General Description Features The Fairchild Switch FSTU16862 provides 20-bits of highspeed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to
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FSTU16862
20-Bit
FSTU16862
20-bits
AN-5008
FSTU16862MTD
FSTU16862QSP
MTD48
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74ACT1284
Abstract: 74LVXZ161284 74LVXZ161284B 74LVXZ161284BMT 74LVXZ161284BTX 74LVXZ161284MEA 74LVXZ161284MEX 74LVXZ161284MTD 74LVXZ161284MTX MS48A
Text: Revised April 2003 74LVXZ161284 • 74LVXZ161284B Low Voltage IEEE 161284 Translating Transceiver with Power-Up Protection General Description Features These transceivers contain eight bidirectional data buffers and eleven control/status buffers to implement a full
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74LVXZ161284
74LVXZ161284B
74LVXZ161284B
74ACT1284
74LVXZ161284
74LVXZ161284BMT
74LVXZ161284BTX
74LVXZ161284MEA
74LVXZ161284MEX
74LVXZ161284MTD
74LVXZ161284MTX
MS48A
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74ALVCF322835
Abstract: 74ALVCF322835G MO-205
Text: Revised May 2002 74ALVCF322835 Low Voltage 36-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in Outputs General Description Features The 74ALVCF322835 low voltage 36-bit universal bus driver combines D-type latches and D-type flip-flops to
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74ALVCF322835
36-Bit
74ALVCF322835
PC133
74ALVCF322835G
MO-205
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KVL16
Abstract: 100LVEL16 100LVEL16M 100LVEL16M8 M08A MO-187 KV16
Text: Revised February 2003 100LVEL16 3.3V ECL Differential Receiver General Description Features The 100LVEL16 is a low voltage differential receiver that contains an internally supplied voltage source, VBB. When used in a single ended input condition the unused input
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100LVEL16
100LVEL16
KVL16
100LVEL16M
100LVEL16M8
M08A
MO-187
KV16
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FIN1026
Abstract: FIN1025 FIN1026MTC MTC14
Text: Revised June 2002 FIN1026 3.3V LVDS 2-Bit High Speed Differential Receiver General Description Features This dual receiver is designed for high speed interconnects utilizing Low Voltage Differential Signaling LVDS technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels.
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FIN1026
100mV,
400Mbs
FIN1026
FIN1025,
FIN1025
FIN1026MTC
MTC14
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74ALVC38
Abstract: 74ALVC38M 74ALVC38MTC M14A MTC14
Text: Revised December 2001 74ALVC38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs General Description Features The ALVC38 contains four 2-input NAND gates with open drain outputs. This product is designed for low voltage
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74ALVC38
ALVC38
74ALVC38
74ALVC38M
74ALVC38MTC
M14A
MTC14
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74ALVCF322835
Abstract: 74ALVCF322835G MO-205
Text: Revised November 2004 74ALVCF322835 Low Voltage 36-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26Ω Series Resistors in Outputs General Description Features The 74ALVCF322835 low voltage 36-bit universal bus driver combines D-type latches and D-type flip-flops to
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74ALVCF322835
36-Bit
74ALVCF322835
PC133
74ALVCF322835G
MO-205
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74ALVC16722
Abstract: 74ALVC16722MTD ALVC16722 MTD64
Text: Revised December 2001 74ALVC16722 Low Voltage 22-Bit Register with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC16722 low voltage 22-bit register contains twenty-two non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus oriented applications. The
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74ALVC16722
22-Bit
ALVC16722
74ALVC16722
74ALVC16722MTD
MTD64
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Untitled
Abstract: No abstract text available
Text: Revised March 2004 NC7SP57 • NC7SP58 TinyLogic ULP Universal Configurable 2-Input Logic Gates General Description Features The NC7SP57 and the NC7SP58 are Universal Configurable 2-Input Logic Gates from Fairchild’s Ultra Low Power ULP Series of TinyLogic. Ideal for applications
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NC7SP57
NC7SP58
NC7SP57
NC7SP58
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74ALVC162373
Abstract: 74ALVC162373T ALVC162373 MTD48
Text: Revised November 2001 74ALVC162373 Low Voltage 16-Bit Transparent Latch with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in Outputs General Description Features The ALVC162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented
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74ALVC162373
16-Bit
ALVC162373
74ALVC162373
74ALVC162373T
MTD48
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74LCXH32245G
Abstract: MO-205 74LCXH32245
Text: Revised August 2003 74LCXH32245 Low Voltage 32-Bit Bidirectional Transceiver with 5V Tolerant Inputs and Outputs with Bushold General Description Features The LCXH32245 contains thirty-two non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus
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74LCXH32245
32-Bit
LCXH32245
74LCXH32245G
MO-205
74LCXH32245
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in69p
Abstract: IN50P in60p IN55N IN69N IN60N IN34N IN68N IN65P IN68P
Text: Preliminary Revised April 2003 OCX160L • OCX160P Crosspoint Switch with LVDS Preliminary • Crosspoint Switch with LVPECL (Preliminary) General Description Features The OCX160L and OCX160P are SRAM-based, nonblocking 80 X 80 digital crosspoint switches capable of
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OCX160L
OCX160P
OCX160L
OCX160P
667Mb/s
53Gb/s
in69p
IN50P
in60p
IN55N
IN69N
IN60N
IN34N
IN68N
IN65P
IN68P
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transistor P479
Abstract: P521 FAIRCHILD P124 FAIRCHILD p491 p331 TRANSISTOR p372 p525 AU38 p268 "Fairchild Semiconductor" fairchild aa35
Text: Revised April 2003 MSX532 532 Port Digital Crosspoint Switch with LVTTL I/O’s General Description Features The MSX family of SRAM-based bit-oriented switching devices offer flow-through NRZ data rates of up to 150Mb/s and registered clock frequencies of up to 75MHz. The I/O
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MSX532
150Mb/s
75MHz.
transistor P479
P521 FAIRCHILD
P124 FAIRCHILD
p491
p331 TRANSISTOR
p372
p525
AU38
p268 "Fairchild Semiconductor"
fairchild aa35
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Untitled
Abstract: No abstract text available
Text: MP03TT800 Series M ITEL Phase Control Dual Thyristor Module S E M IC O N D U C T O R DS5007 - 1.2 November 1998 APPLICATIONS • KEY PARAMETERS 1800V DRM 360A T AV 8100A IT sm (Per arm) TSM ' 800A ^T(RMS) 2500V Motor Control. ■ Controlled Rectifier Bridges.
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MP03TT800
DS5007
MP03TT800-18
MP03TT800-17
MP03-W3/W4
MP03-W3A
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