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    weitek

    Abstract: weitek 4167 chipset for 486 486 system bus 80386 memory
    Text: baSBBTl DDG17Db DS4 S4E » MOSEL IMO VI MS441 Cache Controller PRELIMINARY SimulCache chipset MO S E L - VITELIC FEATURES DESCRIPTION • High Performance Cache Controller optimized for 486 Secondary cache or 386 Primary cache applications • Integrates two 386/486 bus controllers in combination


    OCR Scan     		DDG17Db MS441 MS443 PID070A 0GG17D7 MS441 T-52-33-21 weitek weitek 4167 chipset for 486 486 system bus 80386 memory PDF