Untitled
Abstract: No abstract text available
Text: CY2DP818 1:8 Clock Fanout Buffer 1:8 Clock Fanout Buffer Description Features The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. • Low-voltage operation VDD = 3.3 V ■ 1:8 fanout
|
Original
|
CY2DP818
CY2DP818
38-pin
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CY2DP818 1:8 Clock Fanout Buffer 1:8 Clock Fanout Buffer Features Description • Low-voltage operation VDD = 3.3 V The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. ■ 1:8 fanout
|
Original
|
CY2DP818
CY2DP818
to350
|
PDF
|
CY2DP818
Abstract: CY2DP818ZXC
Text: CY2DP818 1:8 Clock Fanout Buffer Features Description • Low-voltage operation VDD = 3.3V ■ 1:8 fanout The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. ■ Operation to 350 MHz
|
Original
|
CY2DP818
CY2DP818
38-Pin
CY2DP818ZXC
|
PDF
|
Z3817
Abstract: No abstract text available
Text: CY2DP818 1:8 Clock Fanout Buffer 1:8 Clock Fanout Buffer Features Description • Low-voltage operation VDD = 3.3 V The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. ■ 1:8 fanout
|
Original
|
CY2DP818
CY2DP818
to350
Z3817
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CY2DP818 1:8 Clock Fanout Buffer Features Description • Low-voltage operation VDD = 3.3V ■ 1:8 fanout The Cypress CY2DP818 fanout buffer features a single LVDS or a single ended LVTTL compatible input and eight LVPECL output pairs. ■ Operation to 350 MHz
|
Original
|
CY2DP818
CY2DP818
|
PDF
|