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    CD54HCT10 Search Results

    CD54HCT10 Result Highlights (2)

    Part ECAD Model Manufacturer Description Download Buy
    CD54HCT109F3A Texas Instruments High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 Visit Texas Instruments Buy
    CD54HCT10F3A Texas Instruments High Speed CMOS Logic Triple 3-Input NAND Gates 14-CDIP -55 to 125 Visit Texas Instruments Buy
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    CD54HCT10 Price and Stock

    Texas Instruments CD54HCT10F3A

    NAND Gate 3-Element 3-IN CMOS 14-Pin CDIP Tube
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Arrow Electronics CD54HCT10F3A 53 18 Weeks 1
    • 1 $13.22
    • 10 $13.22
    • 100 $13.22
    • 1000 $13.22
    • 10000 $13.22
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    ComSIT USA CD54HCT10F3A 5
    • 1 -
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    • 100 -
    • 1000 -
    • 10000 -
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    RCA CD54HCT109F3A

    IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,DIP,16PIN,CERAMIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components CD54HCT109F3A 92
    • 1 $8.25
    • 10 $8.25
    • 100 $5.0875
    • 1000 $5.0875
    • 10000 $5.0875
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    Harris Semiconductor CD54HCT109F3A

    IC,FLIP-FLOP,DUAL,J/K TYPE,HCT-CMOS,DIP,16PIN,CERAMIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components CD54HCT109F3A 73
    • 1 $8.25
    • 10 $8.25
    • 100 $5.0875
    • 1000 $5.0875
    • 10000 $5.0875
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    CD54HCT109F3A 1
    • 1 $8.25
    • 10 $5.5
    • 100 $5.5
    • 1000 $5.5
    • 10000 $5.5
    Buy Now

    Harris Semiconductor CD54HCT10F3A

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components CD54HCT10F3A 44
    • 1 $20.9426
    • 10 $20.9426
    • 100 $18.8483
    • 1000 $18.8483
    • 10000 $18.8483
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    RCA CD54HCT10F3A

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components CD54HCT10F3A 20
    • 1 $24.9688
    • 10 $24.9688
    • 100 $23.7204
    • 1000 $23.7204
    • 10000 $23.7204
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    CD54HCT10F3A 3
    • 1 $38
    • 10 $38
    • 100 $38
    • 1000 $38
    • 10000 $38
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    CD54HCT10 Datasheets (26)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CD54HCT10 Texas Instruments High Speed CMOS LogicTriple 3-Input NAND Gate Original PDF
    CD54HCT10/3A Harris Semiconductor Triple 3-Input NAND Gate Original PDF
    CD54HCT10/3A RCA Solid State Triple 3-lnput NAND Gate Scan PDF
    CD54HCT107 Texas Instruments Dual J-K Flip-Flop with ResetNegative-Edge Trigger Original PDF
    CD54HCT107/3A Harris Semiconductor Dual J-K Flip-Flop with Reset Original PDF
    CD54HCT107/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HCT107/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HCT107F3A Texas Instruments CD54HCT107 - IC HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14, CERAMIC, DIP-14, FF/Latch Original PDF
    CD54HCT107F3A Texas Instruments Dual J-K Flip-Flop with Reset Negative-Edge Trigger Original PDF
    CD54HCT109 Texas Instruments High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset Original PDF
    CD54HCT109/3A Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Original PDF
    CD54HCT109/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HCT109/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HCT109/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HCT109F3A Texas Instruments High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 Original PDF
    CD54HCT109F3A Texas Instruments Dual J-inverted K Flip-Flop with Set and Reset Positive-Edge Trigger Original PDF
    CD54HCT109F3A Texas Instruments CD54HCT109 - High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 Original PDF
    CD54HCT109F3A Texas Instruments HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE TRIGGER J-K FLIP-FLOPS WITH SET AND RESET Original PDF
    CD54HCT109F3A Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    CD54HCT109F3A96 Texas Instruments Dual J-invertedK Flip-Flop with Set and Reset Positive-Edge Trigger Original PDF

    CD54HCT10 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    HC10

    Abstract: CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HC10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140C Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised May 2003


    Original
    CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140C HC109 HCT109 CD74H CT109) PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HCT10 PDF

    HCT10

    Abstract: CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 PDF

    54LS

    Abstract: CD54HC10
    Text: CD54HC10/3A CD54HCT10/3A S E M I C O N D U C T O R COMPLETE DATA SHEET COMING SOON! June 1997 Description Triple 3-Input NAND Gate Functional Diagram The CD54HC10/3A and CD54HCT10/3A logic gates utilize silicon-gate CMOS technology to achieve operating speeds


    Original
    CD54HC10/3A CD54HCT10/3A CD54HC10/3A CD54HCT10/3A CD54HCT 1000ns 500ns 400ns CD54HC 54LS CD54HC10 PDF

    CD54HC10

    Abstract: CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109) PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 PDF

    CD54HC10

    Abstract: CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128B HCT10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 PDF

    C109

    Abstract: CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 HC109
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 C109 CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 PDF

    C109

    Abstract: CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 HC109
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 C109 CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 PDF

    C109

    Abstract: CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 HC109
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140D Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised July 2003


    Original
    CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140D HC109 HCT109 C109 CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 PDF

    CD74HC10E

    Abstract: CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HCT10 HC10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 CD74HC10E CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HCT10 HC10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109) PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HCT10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HCT10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original
    CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HCT10 PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109) PDF

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original
    CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109) PDF

    Untitled

    Abstract: No abstract text available
    Text: CD54HC109/3A CD54HCT109/3A S E M I C O N D U C T O R COMPLETE DATA SHEET COMING SOON! Dual J-K Flip-Flop with Set and Reset June 1997 Description Functional Diagram The CD54HC109/3A and CD54HCT109/3A are dual J-K flipflops with set and reset. The flip-flop changes state with the


    Original
    CD54HC109/3A CD54HCT109/3A CD54HC109/3A CD54HCT109/3A 1000ns 500ns 400ns CD54HC CD54HCT PDF

    Untitled

    Abstract: No abstract text available
    Text: Semiconductor \COMPLETE DATA SHEET I COMING SOGNI I CD54HC107F3A, CD54HCT107F3A June 1997 Dual J-K Flip-Flop with Reset File Number 3772 Functional Diagram The CD54HC107F3A and CD54HCT107F3A utilize silicongate CMOS technology to achieve operating speeds similar


    OCR Scan
    CD54HC107F3A, CD54HCT107F3A CD54HC107F3A CD54HCT107F3A HC73/3A CD54HCT 1000ns 500ns 400ns PDF

    Untitled

    Abstract: No abstract text available
    Text: High-Reliability High-Speed CMOS Logic ICs CD54HC107/3A CD54HCT107/3A Burn-ln Test-Circuit Connections Static OPEN CD54HC/HCT107 2,3,5,6 Dynamic GROUND OPEN CD54HC/HCT107 Use Static II for /3A burn-in and Dynamic for Life Test. STATIC BURN-IN I Vcc(6V) GROUND


    OCR Scan
    CD54HC107/3A CD54HCT107/3A CD54HC/HCT107 2k-47k CD54HC109/3A CD54HCT109/3A RCA-CD54HC109 CD54HCT109 CD54HC112/3A PDF