C1394A Search Results

C1394A Result Highlights (1)

Part	ECAD Model	Manufacturer	Description	Download	Buy
DC1394A		Analog Devices	LT3480 HV Buck regulator board

C1394A Price and Stock

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Analog Devices Inc DC1394A LT3480 HV BUCK REGULATOR BOARD W
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	DC1394A	Box			1	1 $146.19 10 $146.19 100 $146.19 1000 $146.19 10000 $146.19	Buy Now
Mouser Electronics	DC1394A		3			1 $151.58 10 $151.58 100 $151.58 1000 $151.58 10000 $151.58	Buy Now
Analog Devices Inc	DC1394A		111			1 $146.19 10 $146.19 100 $146.19 1000 $146.19 10000 $146.19	Buy Now
Richardson RFPD	DC1394A				1	1 $141.24 10 $141.24 100 $141.24 1000 $141.24 10000 $141.24	Buy Now

C1394A Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Type	PDF
C1394A		Altera	Controllers, IEEE-1394a Link Layer Controller Core		Original	PDF
C1394A		Lattice Semiconductor	IEEE-1394a Link Layer Controller Core		Original	PDF

C1394A Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
C1394A Abstract: C1394 Text: Conforms to and implements all C1394A IEEE-1394a Link Layer Controller Core functionality of the IEEE 13941995 and IEEE 1394a-2000 standards Based on Texas Instruments TSB12LV32 General Purpose Link Layer controller Supports device data transmis- sion of 400, 200 and 100 Mbps	Original	PDF	C1394A IEEE-1394a 1394a-2000 TSB12LV32 32-bit C139A 1394a-2000 C1394A C1394
Cyclone camera link Abstract: Evatronix C1394A TSB12LV32 C139A Text: C1394A IEEE-1394a Link Layer Controller Core The C139A core implements a link layer controller for the high-speed, highbandwidth serial bus known commercially as FireWire and i.Link™. The core conforms to the IEEE 1394-1995 and 1394a-2000 specifications. It is	Original	PDF	1394a-2000 TSB12LV32 32-bit C1394A 1394-compliant C1394A Cyclone camera link Evatronix C139A
manual SPARTAN-3 XC3S400 evaluation kit Abstract: hcl l21 usb power supply circuit diagram verilog code for Modified Booth algorithm vhdl code for lcd of spartan3E UG331 TT 2222 Horizontal Output Transistor pins out dia verilog for 8 point fft using FPGA spartan3 vhdl code for ldpc decoder types of multipliers ge fanuc cpu 331 Text: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.7 August 19, 2010 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development	Original	PDF	UG331 guides/ug332 manual SPARTAN-3 XC3S400 evaluation kit hcl l21 usb power supply circuit diagram verilog code for Modified Booth algorithm vhdl code for lcd of spartan3E UG331 TT 2222 Horizontal Output Transistor pins out dia verilog for 8 point fft using FPGA spartan3 vhdl code for ldpc decoder types of multipliers ge fanuc cpu 331
night vision technology documentation Abstract: DP8051 radix-2 DIT FFT vhdl program M25PXX 16 point FFT radix-4 VHDL diF fft algorithm VHDL 16 point FFT radix-4 VHDL documentation atmel 336 fft algorithm verilog in ofdm vhdl code for ofdm Text: Lattice Semiconductor Corporation • November 2004 • Volume 10, Number 1 In This Issue New JTAG Programming Support for Low-Cost SPI Configuration Memory Lattice Expands Lead-Free Support Designing FFTs in the LatticeECP FPGA Dynamic Power Management Using	Original	PDF	300mm NL0109 night vision technology documentation DP8051 radix-2 DIT FFT vhdl program M25PXX 16 point FFT radix-4 VHDL diF fft algorithm VHDL 16 point FFT radix-4 VHDL documentation atmel 336 fft algorithm verilog in ofdm vhdl code for ofdm
vhdl code for lcd of spartan3E Abstract: verilog code for Modified Booth algorithm vhdl code for rs232 receiver ge fanuc cpu 331 ug331 vhdl ethernet spartan 3a spartan 3e vga ucf barco 16 BIT ALU design with verilog/vhdl code TUTORIALS xilinx FFT Text: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.5 January 21, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development	Original	PDF	UG331 guides/ug332 vhdl code for lcd of spartan3E verilog code for Modified Booth algorithm vhdl code for rs232 receiver ge fanuc cpu 331 ug331 vhdl ethernet spartan 3a spartan 3e vga ucf barco 16 BIT ALU design with verilog/vhdl code TUTORIALS xilinx FFT
UG331 Abstract: CWda04 XAPP256 manual SPARTAN-3 XC3S400 evaluation kit vhdl code for rs232 receiver hcl l21 usb power supply circuit diagram hcl p38 CIRCUIT diagram R80515 XC3SD1800A-FG676 vhdl ethernet spartan 3a Text: Spartan-3 Generation FPGA User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG331 v1.6 December 3, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development	Original	PDF	UG331 guides/ug332 UG331 CWda04 XAPP256 manual SPARTAN-3 XC3S400 evaluation kit vhdl code for rs232 receiver hcl l21 usb power supply circuit diagram hcl p38 CIRCUIT diagram R80515 XC3SD1800A-FG676 vhdl ethernet spartan 3a