AM29C841/BLA
Abstract: AM29C841PC CD3024 PD3024 am29c800 Am29C900 CD0014
Text: Am29C841 /Am 29C 843 Am29C941 / Am29C943 High-Performance CMOS Bus Interface Latches • JEDEC FCT-compatible specs • Extra-wide 9- and 10-bit data paths • Am29C900 DIP pinout option reduces lead inductance on Vcc and GND pins High-speed parallel latches
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Am29C841
Am29C843
Am29C941
Am29C943
10-bit)
Am29C900
Am29C800
CS-11
AM29C841/BLA
AM29C841PC
CD3024
PD3024
CD0014
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v06c
Abstract: 29C843 CD3024 AM29C841/B3A Am29C841
Text: Am29C841 /Am 29C 843 Am29C941 / Am29C943 High-Performance CMOS Bus Interface Latches • JEDEC FCT-compatible specs • Extra-wide 9- and 10-bit data paths • Am29C900 DIP pinout option reduces lead inductance on Vcc and GND pins High-speed parallel latches
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OCR Scan
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Am29C841
Am29C941
Am29C943
Am29C841/
Am29C843
Am29C941/Am29C943
10-bit)
Am29C900
v06c
29C843
CD3024
AM29C841/B3A
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am29c841
Abstract: 17Z6 Am29C941 Am29C843
Text: Am29C841 / Am29C843 Am29C941 / Am29C943 High-Performance CMOS Bus Interface Latches • • • JEDEC FCT-compatible specs Extra-wide 9- and 10-bit data paths Am29C900 DIP pinout option reduces lead inductance on Vcc and GND pins GENERAL DESCRIPTION The Am29C841 and Am29C843 CMOS Bus Interface
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Am29C841
Am29C843
Am29C941
Am29C943
Am29C841/
Am29C941/
10-bit)
Am29C900
17Z6
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29C841
Abstract: 29C841/
Text: AMD i l REVISIONS LTR D E SC RI PTI ON PATE YR-MO-PA Add PRESET and CLEAR propagation delays to table I for device types 02 and 04. Change figure 4. Editorial changes throughout. APPROVEO 88/07/22 Added devices 05 and 06. Changes to table I. Editorial changes throughout.
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10-WIDE
29C841
29C841/
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