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    8251 PIN Search Results

    8251 PIN Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    8251A/BXA Rochester Electronics LLC Serial I/O Controller, 1 Channel(s), 0.0078125MBps, NMOS, CDIP28, CERAMIC, DIP-28 Visit Rochester Electronics LLC Buy
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet
    CS-DSDMDB15MM-025 Amphenol Cables on Demand Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft Datasheet
    CS-DSDMDB25MM-010 Amphenol Cables on Demand Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft Datasheet

    8251 PIN Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HMC830

    Abstract: hmc830lp6ge EVAL01 OTU1
    Text: HMC830LP6GE v01.0711 FRACTIONAL-N PLL WITH INTEGRATED VCO 25 - 3000 MHz Features • Frequency Range: 25 - 3000 MHz • Exceeds G.8251 and GR-253-CORE Jitter Specifications • Maximum Phase Detector Rate 100 MHz • 89 fs RMS Jitter Generation Typ • Ultra Low Phase Noise


    Original     		PDF HMC830LP6GE GR-253-CORE 24-bit STS-192/STM-16 STS-768/STM-256 100GE 10GFC 16GFC 32GFC HMC830 hmc830lp6ge EVAL01 OTU1

    M955L

    Abstract: am9551 AM9551PC 955L
    Text: 8251/Am9551 8251/Am9551 Programmable Communication Interface ¡APX86 Family DISTINCTIVE CHARACTERISTICS • • • • • Separate control and transm it register input buffers Synchronous or asynchronous serial data transfer Parity, overrun and fram ing errors detected


    OCR Scan     		PDF 8251/Am9551 APX86 8251/Am WF006520 WF006530 WF006560 02334B M955L am9551 AM9551PC 955L

    application USART 8251

    Abstract: USART 8251 interfacing with RS-232 8251 usart bird 4266 8251 microprocessor block diagram INTEL USART 8251 intel 8251 intel 8251 USART Reset GST 5009 intel 4269
    Text: Contents INTRODUCTION. 1 COMMUNICATION FORMATS.1 Using The 8251 Universal Synchronous/Asyncronous Receiver/Transmitter BLOCK DIAGRAM. 2


    OCR Scan     		PDF MCS-074-0576/30K application USART 8251 USART 8251 interfacing with RS-232 8251 usart bird 4266 8251 microprocessor block diagram INTEL USART 8251 intel 8251 intel 8251 USART Reset GST 5009 intel 4269

    8355 8755 intel microprocessor block diagram

    Abstract: MCS-48 8755 intel microprocessor block diagram MCS48 instruction set intel 8755 USART 8251 expanded block diagram MCS-48 Manual The Expanded MCS-48 System mcs48 internal architecture of 8251 USART
    Text: in t e i # ° r <p r?> > V 9 Intel C o rp o ra tio n , 1977 98-413B Price S1 .OO Related Intel Publications “MCS-48 Microcomputer User's Manual" "Using the 8251 Universal Synchronous/Asynchronous “8255 Programmable Peripheral Interface Applications"


    OCR Scan     		PDF 98-413B MCS-48TM NL-10Q6 8355 8755 intel microprocessor block diagram MCS-48 8755 intel microprocessor block diagram MCS48 instruction set intel 8755 USART 8251 expanded block diagram MCS-48 Manual The Expanded MCS-48 System mcs48 internal architecture of 8251 USART

    8251 IC FUNCTION

    Abstract: block diagram 8251 IC 8251 block diagram J941 8251 pin diagram 8251 IC Applications 8251 processor Block Diagram of 8251 usart ic 8251 usart 8251 programmable interface
    Text: 8251/Am9551 Programmable Communication Interface ¡APX86 Family MILITARY INFORMATION • • • • • Separate control and transmit register input buffers Synchronous or asynchronous serial data transfer Parity, overrun, and framing errors detected Half- or full-duplex signaling


    OCR Scan     		PDF 8251/Am9551 APX86 /Am9551 Am9551. 8251 IC FUNCTION block diagram 8251 IC 8251 block diagram J941 8251 pin diagram 8251 IC Applications 8251 processor Block Diagram of 8251 usart ic 8251 usart 8251 programmable interface

    Untitled

    Abstract: No abstract text available
    Text: 8251/Am9551 Programmable Communication Interface ¡APX86 Family M ILITARY IN FO R M A TIO N Separate control and transmit register input buffers Synchronous or asynchronous serial data transfer Parity, overrun, and framing errors detected Half- or full-duplex signaling


    OCR Scan     		PDF 8251/Am9551 APX86 8251/Am9551 Am9551.

    USART 8251

    Abstract: 8251 pin diagram 8251 microprocessor block diagram block diagram 8251 J941 8251 pin configuration of 8251 teradyne 8251 programmable interface 8251 usart
    Text: 8251/A m 9551 Programmable Communication Interface ¡APX86 Family M ILITARY IN FO R M A TIO N Separate control and transmit register input buffers Synchronous or asynchronous serial data transfer Parity, overrun, and framing errors detected Half- or full-duplex signaling


    OCR Scan     		PDF 8251/Am9551 APX86 8251/Am9551 Am9551. USART 8251 8251 pin diagram 8251 microprocessor block diagram block diagram 8251 J941 8251 pin configuration of 8251 teradyne 8251 programmable interface 8251 usart

    8251 IC FUNCTION

    Abstract: interfacing chip 8251 CS-8251T7 CS-8251TH7 CS-8251TV7 ic 8251
    Text: 10V/5V Low Dropout Dual Regulator with Independent Output Enables D escription The CS-8251 is a 10V /5V dual out­ put linear regulator. The 10V ±5% output sources 1A, while the 5V ±5% output sources 250mA. Each output is controlled by its own ENABLE pin. Setting the ENABLE


    OCR Scan     		PDF CS-8251 250mA. T0-220 O-220 CS-8251T7 O-220 CS-8251TV7 CS-8251TH7 8251 IC FUNCTION interfacing chip 8251 ic 8251

    82S52

    Abstract: 272 ac ta 8250 8252 8250A 8251 pin configuration of 8251 8251 pin Applications of 8251 ns 8250 an
    Text: PIN CONFIGURATION SPEED/PACKAGE AVAILABILITY 8250, 82S50 A,F PACKAGE 8250—A,F,W 8251,52—B,F,W 82S50—A,F 82S52—B,F 8250.82S50 WPACKAGE E aE El Vcc 1 DESCRIPTION c[7 "EJ B o e E f 3 The 8250, 8251 and 8252 are gate arrays for decoding and logic conversion applica­


    OCR Scan     		PDF 250--A 52--B 82S50--A 82S52--B 82S50 82S50 82S52 82SS2 82S52 272 ac ta 8250 8252 8250A 8251 pin configuration of 8251 8251 pin Applications of 8251 ns 8250 an

    TO221 package

    Abstract: No abstract text available
    Text: 10V/5V Low Dropout Dual Regulator with Independent Output Enables Description The CS-8251 is a 10V/5V dual out­ put linear regulator. The 10V ±3% output sources 1A, while the 5V ±5% output sources 250mA. Each output is controlled by its own E N A B L E pin. Setting the E N A B L E


    OCR Scan     		PDF CS-8251 CS-8251 250mA. O-221) O-22D TQ-220 CS-8251T7 CS-K25ITV7 TO221 package

    82S52

    Abstract: N8250N N8250 S8250F N8250F N82S52F
    Text: DESCRIPTION The 8250, 8251 and 8252 are gate arrays for decoding and logic conversion applica­ tions. The 8250 converts 3 lines of input to a one-of-eight output. The fourth input line D is utilized as an inhibit to allow use in larger decoding networks.


    OCR Scan     		PDF 82S50 82S52 N8250N N8250 S8250F N8250F N82S52F

    ta 8250

    Abstract: 8252 Ta 8251 8251 82S52 N82S52N 8251 pin description Applications of 8251 N8250F S8252F
    Text: DESCRIPTION The 8250, 8251 and 8252 are gate arrays fo r decoding and logic conversion a p p lic a ­ tions. The 8250 con verts 3 lines of input to a one-of-eight output. The fourth input line D is utilized as an inhibit to allow use in larger decoding netw orks.


    OCR Scan     		PDF -18mA 82S50 82S52 82S50/S52 ta 8250 8252 Ta 8251 8251 N82S52N 8251 pin description Applications of 8251 N8250F S8252F

    atf-25100

    Abstract: AVANTEK transistor AVANTEK ATF-25100-GP3 93 40s
    Text: AVANTEK Q INC SOE D im n b h OGDhSbS b ATF-25100 AT-8251 0.5-10 GHz Lôw Noise Gallium Arsenide FET avantek Features Avantek Chip Outline • Low Noise Flgure:.0.8 dB typical at 4 GHz » High Associated Gain: 14.0 dB typical at 4 GHz • High Output Power: 21.0 dBm typical Pkjb


    OCR Scan     		PDF ATF-25100 AT-8251) ATF-25100 reliab127 AVANTEK transistor AVANTEK ATF-25100-GP3 93 40s

    intel 8251 uart

    Abstract: INTEL 8251A USART intel 8251 USART pin configuration of 8251 usart 8251 IC FUNCTION intel IC 8251 8251 intel UART 8251 intel 8251 CFI2511C
    Text: CFI2511C CFI2511C 8251 G ENERA L DESCRIPTIO N: UART CFI2511C is a Universal Synchronous/Asynchronous Receiver/Transmitter USART megafunction which is a software and function compatible with Intel 8251A USART. Some input/output interface signals of the standard 8251A and the CFI2511C differ. Since the CFI2511C is designed as fully static logic, it does


    OCR Scan     		PDF CFI2511C CFI2511C intel 8251 uart INTEL 8251A USART intel 8251 USART pin configuration of 8251 usart 8251 IC FUNCTION intel IC 8251 8251 intel UART 8251 intel 8251

    Untitled

    Abstract: No abstract text available
    Text: Technical Specifications ELCO Technical Data B asic grid 100 2 54 x 100(2,54) In s e rtio n Force Series 8251 8352 8275 8281 8381 1-6 oz per contact W ith d ra w a l force 75 oz mm. per contact C o n ta c t re s is ta n c e 12 millohms max for gold plating


    OCR Scan     		PDF TDDS71S 0GGG223

    Untitled

    Abstract: No abstract text available
    Text: 10V/5V Low Dropout Dual Regulator with Independent Output Enables Description The CS-8251 is a 10V/5V dual out­ p u t linear regulator. The 10V ±5% ou tp u t sources 1A, while the 5V ±5% o u tp u t sources 250mA. Each ou tp u t is controlled by its ow n


    OCR Scan     		PDF CS-8251 250mA. T0-220 O-220 -2211isiu CS-8251T7 CS-8251TH7

    AT82

    Abstract: AVANTEK transistor
    Text: AVA N T E K INC SOE D O avantek ATF-25100 AT-8251 0.5-10 GHz Lòw Noise Gallium Arsenide FET 'T-'M-zs Features Avantek Chip Outline • Low Noise Flgure:.0.8 dB typical at 4 GHz • High Associated Gain: 14.0 dB typical at 4 GHz • High Output Power: 21.0 dBm typical Pi dB


    OCR Scan     		PDF ATF-25100 AT-8251) ATF-25100 AT82 AVANTEK transistor

    Untitled

    Abstract: No abstract text available
    Text: Technical Specifications ELCO Technical Data B asic grid 100 2 54 x 100(2,54) In s e rtio n Force Series 8251 8352 8275 8281 8381 1-6 oz per contact W ith d ra w a l force 75 oz mm. per contact C o n ta c t re s is ta n c e 12 millohms max for gold plating


    OCR Scan     		PDF Thermo38 000Q2H1

    8 F 804

    Abstract: No abstract text available
    Text: Technical Specifications ELCO Technical Data B asic grid 100 2 54 x 100(2,54) In s e rtio n Force Series 8251 8352 8275 8281 8381 1-6 oz per contact W ith d ra w a l force 75 oz mm. per contact C o n ta c t re s is ta n c e 12 millohms max for gold plating


    OCR Scan     		PDF i005715 JDQS71S 8 F 804

    USART 8251

    Abstract: P8251A pin configuration of 8251 usart D8251A MD8251A MD8251 pin diagram 8251A block diagram 8251A 8251a tc 9123
    Text: 8251A Program m able Communication In terface DISTINCTIVE CHARACTERISTICS G ENERAL DESCRIPTION • Synchronous operation up to 64K baud The AM D 8251A is the enhanced version of the industry sta n d a rd 8251 U n ive rsa l S y n c h ro n o u s /A s y n c h ro n o u s


    OCR Scan     		PDF

    ATF-25100

    Abstract: ATF25100-GP3 AT-8251 at8251
    Text: HEW LETT-PACKARD/ C MP NT S b lE H EW LETT PACKARD m D • l 4 l4 7 S f l 4 ODCmSB 723 ATF-25100 (AT-8251 0.5-10 GHz Low Noise Gallium Arsenide FET Features Chip Outline • • Low Noise Figure: 0.8 dB typical at 4 GHz High Associated Gain: 14.0 dB typical at 4 GHz


    OCR Scan     		PDF ATF-25100 AT-8251 ATF-25100 ATF25100-GP3 AT-8251 at8251

    TA 8275 H

    Abstract: ic 8275
    Text: Technical Specifications ELCO Technical Data B asic grid 100 2 54 x 100(2,54) In s e rtio n Force Series 8251 8352 8275 8281 8381 1-6 oz per contact W ith d ra w a l force 75 oz mm. per contact C o n ta c t re s is ta n c e 12 millohms max for gold plating


    OCR Scan     		PDF TD0S715 TA 8275 H ic 8275

    TA 8275 H

    Abstract: No abstract text available
    Text: Technical Specifications ELCO Technical Data B asic grid 100 2 54 x 100(2,54) In s e rtio n Force Series 8251 8352 8275 8281 8381 1-6 oz per contact W ith d ra w a l force 75 oz mm. per contact C o n ta c t re s is ta n c e 12 millohms max for gold plating


    OCR Scan     		PDF iOGS71S 00DG21S TA 8275 H

    1HA 104

    Abstract: AT82 ATF-25100
    Text: What H E W L E T T 1"HA P A C K A R D ATF-25100 AT-8251 0.5-10 GHz Low Noise Gallium Arsenide FET Features • • • Chip Outline Low Noise Figure: 0.8 dB typical at 4 GHz High Associated Gain: 14.0 dB typical at 4 GHz High Output Power: 21.0 dBm typical Pi dB


    OCR Scan     		PDF ATF-25100 AT-8251) ATF-25100 1HA 104 AT82