v945
Abstract: V943 272850 270929-003 80960SA 80960SB N80960SA N80960SB S80960SA S80960SB
Text: 80960SA/SB SPECIFICATION UPDATE Release Date: July, 1996 Order Number: 272850-001 The 80960SA/SB may contain design defects or errors known as errata. Characterized errata that may cause the 80960SA/SB’s behavior to deviate from published specifications are
|
Original
|
80960SA/SB
80960SA/SB
v945
V943
272850
270929-003
80960SA
80960SB
N80960SA
N80960SB
S80960SA
S80960SB
|
PDF
|
v945
Abstract: v943 8244 INTEL 80960SA 80960SB N80960SA N80960SB S80960SA W225 intel DOC
Text: 80960SA/SB SPECIFICATION UPDATE Release Date: August, 2004 Order Number: 272850-003 The 80960SA/SB may contain design defects or errors known as errata which may cause the 80960SA/SB to deviate from published specifications. Current characterized errata are documented in this Specification Update.
|
Original
|
80960SA/SB
80960SA/SB
v945
v943
8244 INTEL
80960SA
80960SB
N80960SA
N80960SB
S80960SA
W225
intel DOC
|
PDF
|
v945
Abstract: 80960SA N80960SB W225 80960SB N80960SA S80960SA S80960SB intel DOC n80960
Text: 80960SA/SB SPECIFICATION UPDATE Release Date: June, 1997 Order Number: 272850-002 The 80960SA/SB may contain design defects or errors known as errata which may cause the 80960SA/SB to deviate from published specifications. Current characterized errata are documented in this Specification Update.
|
Original
|
80960SA/SB
80960SA/SB
v945
80960SA
N80960SB
W225
80960SB
N80960SA
S80960SA
S80960SB
intel DOC
n80960
|
PDF
|
Untitled
Abstract: No abstract text available
Text: Debugging 7 CHAPTER 7 DEBUGGING This chapter describes the tracing facilities of the 80960SA/SB processor, which allow the monitoring of instruction execution. OVERVIEW OF THE TRACE-CONTROL FACILITIES The 80960SA/SB processor provides facilities for monitoring the activity of the processor by
|
OCR Scan
|
80960SA/SB
|
PDF
|
Intel i960 architecture
Abstract: 80960SA 80960SB A80960SA 80960sa manual
Text: Guide to This Manual 7 CHAPTER 1 GUIDE TO THIS MANUAL INTRODUCTION This manual provides reference information applicable to the 80960SA/SB embedded processor. It is intended for use by both software and hardware designers fam iliar with the principles of microprocessors and with the 80960SA/SB architecture.
|
OCR Scan
|
80960SA/SB
80960SB
80960SA
Intel i960 architecture
A80960SA
80960sa manual
|
PDF
|
stores procedure
Abstract: No abstract text available
Text: Procedure Calls 4 CHAPTER 4 PROCEDURE CALLS This chapter describes the 80960SA/SB processor's procedure call and stack mechanism. It also describes the supervisor call mechanism, which provides a means of calling privileged procedures such as kernel services.
|
OCR Scan
|
80960SA/SB
stores procedure
|
PDF
|
control unit of a processor
Abstract: No abstract text available
Text: lACs y7 CHAPTER 11 lACs This chapter describes the intra-agent communication IAC m echanism of the 80960SA/SB processor. Included is a description of the IAC-message structure, the IAC-message sending and receiving mechanism, and reference information on the available IAC messages.
|
OCR Scan
|
80960SA/SB
control unit of a processor
|
PDF
|
80960SA
Abstract: 80960SB
Text: Processor Management and Initialization 3 CHAPTER 3 PROCESSOR MANAGEMENT AND INITIALIZATION This chapter 80960SA/SB a description the necessary describes the facilities for initializing and managing the operation of the processor. Included is an overview o f the processor-management facilities and
|
OCR Scan
|
80960SA/SB
80960SA
80960SB
|
PDF
|
NFP-32
Abstract: No abstract text available
Text: Faults 6 CHAPTER 6 FAULTS This chapter describes the fault handling facilities of the 80960SA/SB processor. The subjects covered include the fault-handling data structures, the software support required for fault handling, and the fault handling mechanism. A reference section that contains detailed
|
OCR Scan
|
80960SA/SB
Number16
NFP-32
|
PDF
|
Untitled
Abstract: No abstract text available
Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped
|
OCR Scan
|
80960SA
32-BIT
16-BIT
512-Byte
80960SB
16-Bit
80960SA
|
PDF
|
T7 DIODE
Abstract: No abstract text available
Text: inttJ PBßyiiflOMÄlHV 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped
|
OCR Scan
|
80960SA
32-BIT
16-BIT
512-Byte
80960KA/
80960SB
T7 DIODE
|
PDF
|
Untitled
Abstract: No abstract text available
Text: in te i 80960SA/80960SB EMBEDDED 32-BIT PROCESSORS WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture — 16 MIPS Burst Execution at 16 MHz — 5 MIPS* Sustained Execution at 16 MHz Built-In Interrupt Controller — 4 Direct Interrupt Pins — 32 Priority Levels 256 Vectors
|
OCR Scan
|
80960SA/80960SB
32-BIT
16-BIT
80960SB
512-Byte
|
PDF
|
80960SA
Abstract: 80960SB 65A176 AD427
Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded ■ Pin Compatible with 80960SB Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache
|
Original
|
80960SA
32-BIT
16-BIT
80960SB
512-Byte
80960SA
80960SB
65A176
AD427
|
PDF
|
VAX-11
Abstract: PLCC 68 intel package dimensions 270917 w1a31 intel core i7 processors their registers in term of 32-bit mode
Text: in te i 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped
|
OCR Scan
|
80960SA
32-BIT
16-BIT
512-Byte
Local\32-Bit
80960SB
80-Lead
VAX-11
PLCC 68 intel package dimensions
270917
w1a31
intel core i7 processors their registers in term of 32-bit mode
|
PDF
|
|
|
80960SA
Abstract: 80960SB 65A176 272206-003
Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz ■ 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached
|
Original
|
80960SA
32-BIT
16-BIT
512-Byte
80960SB
80-Lead
80960SA
80960SB
65A176
272206-003
|
PDF
|
Untitled
Abstract: No abstract text available
Text: 80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS • ■ ■ High-Performance Embedded Architecture — 20 MIPS* Burst Execution at 20 MHz — 7.5 MIPS Sustained Execution at 20 MHz 512-Byte On-Chip Instruction Cache — Direct Mapped — Parallel Load/Decode for Uncached
|
OCR Scan
|
80960SA
32-BIT
16-BIT
512-Byte
80960SB
80-Lead
84-Le
|
PDF
|
80960SA
Abstract: 80960SB 80960
Text: Instruction Set g CHAPTER 9 INSTRUCTION SET This chapter provides an overview of the instruction set for the 80960SA/SB processor. Included is a discussion of the instruction format, a summary of the instruction groups and the instructions in each group. This chapter gives detailed descriptions of each of the instructions. The instructions are listed
|
OCR Scan
|
80960SA/SB
80960SA
80960SB
80960
|
PDF
|
80960SA
Abstract: 80960SB
Text: Introduction to ¡960 Architecture 2 CH A PTER 2 IN TR O D U C T IO N TO i960™ A R C H ITE C TU R E This chapter provides an overview of the architecture on which the 80960 series o f processors is based. AN EMBEDDED 32-BIT ARCHITECTURE FROM INTEL The 80960SA/SB processor marks the continuation o f the i960 architecture series — an
|
OCR Scan
|
32-BIT
80960SA/SB
16-bit
80960SA
80960SB
|
PDF
|
210997
Abstract: intel intellec prompt 48 Mohawk 270929 270929-003 210461 80960SB RMX-80 376 ICE intel intel packaging handbook 240800
Text: i960” SA/SB Microprocessor Reference Manual 1991 Order Number: 270929-003 intei* LITERATURE To order Intel literature or obtain literature pricing information in the U.S. and Canada call or write Intel Literature Sales. In Europe and other international locations, please contact your local sales office or
|
OCR Scan
|
16MHz
80960SA/SB
210997
intel intellec prompt 48
Mohawk
270929
270929-003
210461
80960SB
RMX-80
376 ICE intel
intel packaging handbook 240800
|
PDF
|
MCC68k
Abstract: mvme167 intel 1302 ROM amd 29030 80386 intel microprocessor qt960 29030 SRAM 6114 80960 KB 25 IDT 3081E
Text: i960 MICROPROCESSOR COMPETITIVE BENCHMARK REPORT Nov. 3, 1993 80960 Applications Engineering Intel Corporation 5000 W. Chandler Blvd. C5-233 Chandler AZ 85226 06/13/95 Intel Corporation makes no warranty for the use of its products and assumes no responsibility for any errors which may appear in
|
Original
|
C5-233
i860TM
EC680401
MCC68k
mvme167
intel 1302 ROM
amd 29030
80386 intel microprocessor
qt960
29030
SRAM 6114
80960 KB 25
IDT 3081E
|
PDF
|
CXD1160aq
Abstract: VL82C486-FC2 VL82C486FC NCR53C720 vl82c486 cxd1160 74HC125 EPM7128 d75304gf A1280
Text: Issued March 1997 232-5109 Data Pack H Surface mount test clips Manufacturers device number to RS stock number cross reference Data Sheet N.B. Some devices have the same basic type numbers but are available in several package styles. Before selecting a test clip ensure that the package type matches that of the device to be tested.
|
Original
|
A1240-2
A1240A-2
A1280
A1425
A1460
CXD1160aq
VL82C486-FC2
VL82C486FC
NCR53C720
vl82c486
cxd1160
74HC125
EPM7128
d75304gf
A1280
|
PDF
|
VL82C486-FC2
Abstract: NCR53C720 XCS3201FN SN74ACT8818 NCR53C700 cxd1160 VL82C316 CL-GD6440 xc3042-100pq100c CXD1160AQ
Text: Issued November 1994 018-994 Data Pack H Surface mount test clips Manufacturers device number to RS stock number cross reference Data Sheet N.B. Some devices have the same basic type numbers but are available in several package styles. Before selecting a test clip ensure that the package type matches that of the device to be tested.
|
Original
|
A1240-2
A1240A-2
A1280
A1425
A1460
VL82C486-FC2
NCR53C720
XCS3201FN
SN74ACT8818
NCR53C700
cxd1160
VL82C316
CL-GD6440
xc3042-100pq100c
CXD1160AQ
|
PDF
|
80960CA
Abstract: 80960CF 80960HA 80960HD 80960JA 80960JD 80960JF 80960KA 80960KB 80960SA
Text: i960 Microprocessor Benchmark Report January 1998 Order Number: 272950-002 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability
|
Original
|
20Mhz
25Mhz
33Mhz
40Mhz
25/50Mhz
20/60Mhz
80960CA
80960CF
80960HA
80960HD
80960JA
80960JD
80960JF
80960KA
80960KB
80960SA
|
PDF
|
VL82C486-FC2
Abstract: CXD1160AQ VL82C486 VL82C315 XC3042-100PQ100C XC3020-70-PQ100C NCR53C700 NCR53C720 xc3042-100pq CXD1160
Text: Issued March 1999 232-5109 Data Pack H Surface mount test clips Manufacturers device number to RS stock number cross reference Data Sheet N.B. Some devices have the same basic type numbers but are available in several package styles. Before selecting a test clip ensure that the package type matches that of the device to be tested.
|
Original
|
A1280
A1425
A1460
ATT1C05
CL-GD6440
CL-SII260-15QC-D
VL82C486-FC2
CXD1160AQ
VL82C486
VL82C315
XC3042-100PQ100C
XC3020-70-PQ100C
NCR53C700
NCR53C720
xc3042-100pq
CXD1160
|
PDF
|
