K7J161882B
Abstract: K7J161882B-FC25 K7J161882B-FC30 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25 K7J163682B-FC30 SRAM sheet samsung
Text: K7J163682B K7J161882B K7J160882B Preliminary 512Kx36 & 1Mx18 & 2Mx8 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram
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K7J163682B
K7J161882B
K7J160882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit,
165FBGA
K7J161882B
K7J161882B-FC25
K7J161882B-FC30
K7J163682B
K7J163682B-FC16
K7J163682B-FC20
K7J163682B-FC25
K7J163682B-FC30
SRAM sheet samsung
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K7J641882M
Abstract: K7J641882M-FC25 K7J641882M-FC30 K7J643682M K7J643682M-FC16 K7J643682M-FC20 K7J643682M-FC25 K7J643682M-FC30
Text: K7J643682M K7J641882M K7J640882M Preliminary 2Mx36 & 4Mx18 & 8Mx8 DDR II SIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit, 8Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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K7J643682M
K7J641882M
K7J640882M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit,
K7J641882M
K7J641882M-FC25
K7J641882M-FC30
K7J643682M
K7J643682M-FC16
K7J643682M-FC20
K7J643682M-FC25
K7J643682M-FC30
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K7I641884M
Abstract: K7I641884M-FC25 K7I641884M-FC30 K7I643684M K7I643684M-FC16 K7I643684M-FC20 K7I643684M-FC25 K7I643684M-FC30 IR 10e 7c 5N7N
Text: K7I643684M K7I641884M K7I640884M Preliminary 2Mx36 & 4Mx18 & 8Mx8 DDRII CIO b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit, 4Mx8-bit DDRII CIO b4 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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K7I643684M
K7I641884M
K7I640884M
2Mx36
4Mx18
1Mx36-bit,
2Mx18-bit,
K7I641884M
K7I641884M-FC25
K7I641884M-FC30
K7I643684M
K7I643684M-FC16
K7I643684M-FC20
K7I643684M-FC25
K7I643684M-FC30
IR 10e 7c
5N7N
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Untitled
Abstract: No abstract text available
Text: K7J163682B K7J161882B K7J160882B Preliminary 512Kx36 & 1Mx18 & 2Mx8 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram
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Original
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PDF
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K7J163682B
K7J161882B
K7J160882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit,
165FBGA
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K7I641882
Abstract: FC30 K7I643682M-FC25 K7I641882M K7I641882M-FC25 K7I641882M-FC30 K7I643682M K7I643682M-FC16 K7I643682M-FC20 K7I643682M-FC30
Text: K7I643682M K7I641882M K7I640882M Preliminary 2Mx36 & 4Mx18 & 8Mx8 DDRII CIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit, 8Mx8-bit DDRII CIO b2 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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K7I643682M
K7I641882M
K7I640882M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit,
K7I641882
FC30
K7I643682M-FC25
K7I641882M
K7I641882M-FC25
K7I641882M-FC30
K7I643682M
K7I643682M-FC16
K7I643682M-FC20
K7I643682M-FC30
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Untitled
Abstract: No abstract text available
Text: K7J163682B K7J161882B K7J160882B Preliminary 512Kx36 & 1Mx18 & 2Mx8 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx8-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram
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Original
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PDF
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K7J163682B
K7J161882B
K7J160882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit,
K7J163682BtCHDX
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Untitled
Abstract: No abstract text available
Text: K7J643682M K7J641882M Preliminary 2Mx36 & 4Mx18 DDR II SIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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K7J643682M
K7J641882M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit
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K7J161882B
Abstract: K7J161882B-FC20 K7J161882B-FC25 K7J161882B-FC30 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25 K7J163682B-FC30
Text: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary
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Original
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K7J163682B
K7J161882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
165FBGA
K7J161882B
K7J161882B-FC20
K7J161882B-FC25
K7J161882B-FC30
K7J163682B
K7J163682B-FC16
K7J163682B-FC20
K7J163682B-FC25
K7J163682B-FC30
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Untitled
Abstract: No abstract text available
Text: Preliminary K7I643684M K7I641884M 2Mx36 & 4Mx18 DDRII CIO b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit DDRII CIO b4 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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K7I643684M
K7I641884M
1Mx36-bit,
2Mx18-bit
2Mx36
4Mx18
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10A4-B
Abstract: No abstract text available
Text: Preliminary K7I643684M K7I641884M 2Mx36 & 4Mx18 DDRII CIO b4 SRAM Document Title 1Mx36-bit, 2Mx18-bit DDRII CIO b4 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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K7I643684M
K7I641884M
1Mx36-bit,
2Mx18-bit
2Mx36
4Mx18
10A4-B
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Untitled
Abstract: No abstract text available
Text: Preliminary K7I643682M K7I641882M 2Mx36 & 4Mx18 DDRII CIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit DDRII CIO b2 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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PDF
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K7I643682M
K7I641882M
2Mx36-bit,
4Mx18-bit
2Mx36
4Mx18
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Untitled
Abstract: No abstract text available
Text: K7J643682M K7J641882M Preliminary 2Mx36 & 4Mx18 DDR II SIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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PDF
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K7J643682M
K7J641882M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit
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Untitled
Abstract: No abstract text available
Text: Preliminary K7I643682M K7I641882M 2Mx36 & 4Mx18 DDRII CIO b2 SRAM Document Title 2Mx36-bit, 4Mx18-bit DDRII CIO b2 SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. Mar. 9, 2003 Advance 0.1 1. Correct the JTAG ID register definition
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Original
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K7I643682M
K7I641882M
2Mx36-bit,
4Mx18-bit
2Mx36
4Mx18
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D0-35
Abstract: K7J321882M K7J321882M-FC16 K7J321882M-FC20 K7J321882M-FC25 K7J323682M K7J323682M-FC16 K7J323682M-FC20 K7J323682M-FC25 7P JTAG
Text: K7J323682M K7J321882M 1Mx36 & 2Mx18 DDR II SIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. July, 15 2001 Advance 0.1 1. Pin name change from DLL to Doff 2. Update JTAG test conditions.
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K7J323682M
K7J321882M
1Mx36
2Mx18
1Mx36-bit,
2Mx18-bit
D0-35
K7J321882M
K7J321882M-FC16
K7J321882M-FC20
K7J321882M-FC25
K7J323682M
K7J323682M-FC16
K7J323682M-FC20
K7J323682M-FC25
7P JTAG
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Untitled
Abstract: No abstract text available
Text: Preliminary K7R643684M K7R641884M 2Mx36 & 4Mx18 QDRTM II b4 SRAM Document Title 2Mx36-bit, 4Mx18-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Sep 14, 2002 Advance 0.1 1. Update AC timing characteristics. 2. Change the JTAG instruction coding.
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K7R643684M
K7R641884M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit
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K7R641884M-FC25
Abstract: K7R643684M-FC20
Text: Preliminary K7R643684M K7R641884M 2Mx36 & 4Mx18 QDRTM II b4 SRAM Document Title 2Mx36-bit, 4Mx18-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Sep 14, 2002 Advance 0.1 1. Update AC timing characteristics. 2. Change the JTAG instruction coding.
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Original
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K7R643684M
K7R641884M
2Mx36-bit,
4Mx18-bit
2Mx36
4Mx18
K7R641884M-FC25
K7R643684M-FC20
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D0-35
Abstract: K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25
Text: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary
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Original
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K7J163682B
K7J161882B
512Kx36
1Mx18
512Kx36-bit,
1Mx18-bit
165FBGA
D0-35
K7J161882B
K7J161882B-FC16
K7J161882B-FC20
K7J161882B-FC25
K7J163682B
K7J163682B-FC16
K7J163682B-FC20
K7J163682B-FC25
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K7R643684M-FC30
Abstract: K7R641884M-FC20 K7R641884M K7R643684M-FC25 K7R641884M-FC25 K7R643684M K7R643684M-FC16 K7R643684M-FC20 SRAM sheet samsung K7R641884MFC20
Text: Preliminary K7R643684M K7R641884M 2Mx36 & 4Mx18 QDRTM II b4 SRAM Document Title 2Mx36-bit, 4Mx18-bit QDRTM II b4 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Sep 14, 2002 Advance 0.1 1. Update AC timing characteristics. 2. Change the JTAG instruction coding.
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Original
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K7R643684M
K7R641884M
2Mx36
4Mx18
2Mx36-bit,
4Mx18-bit
K7R643684M-FC30
K7R641884M-FC20
K7R641884M
K7R643684M-FC25
K7R641884M-FC25
K7R643684M
K7R643684M-FC16
K7R643684M-FC20
SRAM sheet samsung
K7R641884MFC20
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Untitled
Abstract: No abstract text available
Text: K7J323682M K7J321882M 1Mx36 & 2Mx18 DDR II SIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. July, 15 2001 Advance 0.1 1. Pin name change from DLL to Doff 2. Update JTAG test conditions.
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K7J323682M
K7J321882M
1Mx36
2Mx18
1Mx36-bit,
2Mx18-bit
731KB
\AVNET\09082007\SAMS\K7J321882M-FC270
07-Sep-2007
K7J321882M-FC250
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Untitled
Abstract: No abstract text available
Text: K7J323682M K7J321882M 1Mx36 & 2Mx18 DDR II SIO b2 SRAM Document Title 1Mx36-bit, 2Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. July, 15 2001 Advance 0.1 1. Pin name change from DLL to Doff 2. Update JTAG test conditions.
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Original
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PDF
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K7J323682M
K7J321882M
1Mx36
2Mx18
1Mx36-bit,
2Mx18-bit
charaQ4/2006
Q2/2007
K7J321882M-FI250
Q1/2002
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k7d163674b-hc33
Abstract: K7D163674B K7D161874B-HC27 K7D161874B-HC30 K7D161874B-HC33 K7D161874B-HC37 K7D163674
Text: Advance 512Kx36 & 1Mx18 SRAM K7D163674B K7D161874B Document Title 16M DDR SYNCHRONOUS SRAM Revision History Rev No. History Draft Data Remark Rev. 0.0 Initial document. Oct. 2003 Advance Rev. 0.1 Change JTAG DC OPERATING CONDITONS/AC TEST CONDITIONS -to support 1.8~2.5V VDD, change some items.
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512Kx36
1Mx18
K7D163674B
K7D161874B
012MAX
k7d163674b-hc33
K7D163674B
K7D161874B-HC27
K7D161874B-HC30
K7D161874B-HC33
K7D161874B-HC37
K7D163674
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K7D161874B-HC27
Abstract: K7D161874B-HC30 K7D161874B-HC33 K7D161874B-HC37 k7d163674b-hc33 SRAM 8T
Text: K7D163674B K7D161874B 512Kx36 & 1Mx18 SRAM Document Title 16M DDR SYNCHRONOUS SRAM Revision History Rev No. History Draft Data Remark Rev. 0.0 Initial document. Oct. 2003 Advance Rev. 0.1 Change JTAG DC OPERATING CONDITONS/AC TEST CONDITIONS -to support 1.8~2.5V VDD, change some items.
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PDF
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K7D163674B
K7D161874B
512Kx36
1Mx18
012MAX
K7D161874B-HC27
K7D161874B-HC30
K7D161874B-HC33
K7D161874B-HC37
k7d163674b-hc33
SRAM 8T
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K7D163674B
Abstract: No abstract text available
Text: K7D163674B K7D161874B 512Kx36 & 1Mx18 SRAM Document Title 16M DDR SYNCHRONOUS SRAM Revision History Rev No. History Draft Data Remark Rev. 0.0 Initial document. Oct. 2003 Advance Rev. 0.1 Change JTAG DC OPERATING CONDITONS/AC TEST CONDITIONS -to support 1.8~2.5V VDD, change some items.
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Original
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K7D163674B
K7D161874B
512Kx36
1Mx18
012MAX
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C 5121-00
Abstract: s48c tlc 1125 2811DZ D7528 TL500 TL 413 tl501 tlc1125 TLC7533
Text: SYSTEM/SERVO CIRCUITS SELECTION GUIDE data acquisition and conversion single-slope and dual-slope converters values specified for Ta = 25 C DESCRIPTION RESOLUTION SPEED (ms) 4 1/2 Digits 34 Dual-slope A/D with BCD output Dual-slope analog processors TYPE
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OCR Scan
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PDF
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SLYD002
SLYD002
TLC7135
ICL7135
TL500
TL501
TL502
TL503
C 5121-00
s48c
tlc 1125
2811DZ
D7528
TL 413
tl501
tlc1125
TLC7533
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