Untitled
Abstract: No abstract text available
Text: Interactive DVD Content Steve Smiley Malcolm MacNiven Intel Architecture Labs 1 Interactive DVD Content Agenda: l Overview: – Two types of interactive DVD content – DVD decode implementations l Key Learnings: – DDEM – Resource Conflicts – Aspect ratio correction
|
Original
|
PDF
|
|
ch7021a
Abstract: 864x625
Text: CH7021A Chrontel CH7021A SDTV / HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • General Description VGA to SDTV/EDTV/HDTV conversion supporting graphics resolutions up to 1600x1200 HDTV support for 480p, 576p, 720p, 1080i and
|
Original
|
PDF
|
CH7021A
1600x1200
1080i
1080p
CH7021A-TEF
CH7021A-TEF-TR
CH7021A-BF
CH7021A-BF-TR
864x625
|
Untitled
Abstract: No abstract text available
Text: CH7021/CH7022 Chrontel CH7021/CH7022 SDTV / HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • General Description VGA to SDTV/EDTV/HDTV conversion supporting graphics resolutions up to 1600x1200
|
Original
|
PDF
|
CH7021/CH7022
CH7021/CH7022
1600x1200
1080i
1080p
CH7021
CH7021A-TEF-TR
CH7021A-BF
CH7021A-BF-TR
|
scart vga
Abstract: s-video TO VGA MONITOR PINOUt CH7022 832x624 vga to svideo circuit diagram 1900x1200 CH7021A-TEF CH7021A SECAM-60 vga to s-video PINOUt
Text: CH7021/CH7022 Chrontel CH7021/CH7022 SDTV/EDTV/HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • • General Description SDVO[1] to SDTV/EDTV/HDTV conversion supporting up to 160 MHz pixel clock
|
Original
|
PDF
|
CH7021/CH7022
CH7021/CH7022
1600x1200
1080i
1080p
CH7021
CH7022A-BF
CH7022A-BF-TR
scart vga
s-video TO VGA MONITOR PINOUt
CH7022
832x624
vga to svideo circuit diagram
1900x1200
CH7021A-TEF
CH7021A
SECAM-60
vga to s-video PINOUt
|
TW2880
Abstract: TW2864
Text: Techwell Application Note 1659 TW2880P-BC2-GR Chip Application Note Table of Contents Section 1: Clockgen and PLL . 11
|
Original
|
PDF
|
TW2880P-BC2-GR
/tw2880/disp
/tw2880/rec
TW2880
TW2864
|
CH7021A-TEF
Abstract: 2200x1125 CH7021 CH7022 CH7021A CH7022A-BF vga to s-video PINOUt 960x600 scart vga SECAM-60
Text: CH7021/CH7022 Chrontel CH7021/CH7022 SDTV / HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • General Description VGA to SDTV/EDTV/HDTV conversion supporting graphics resolutions up to 1600x1200
|
Original
|
PDF
|
CH7021/CH7022
CH7021/CH7022
1600x1200
1080i
1080p
CH7021
CH7022A-BF
CH7022A-BF-TR
CH7021A-TEF
2200x1125
CH7022
CH7021A
CH7022A-BF
vga to s-video PINOUt
960x600
scart vga
SECAM-60
|
Untitled
Abstract: No abstract text available
Text: CH7021/CH7022 Chrontel CH7021/CH7022 SDTV/EDTV/HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • • General Description SDVO[1] to SDTV/EDTV/HDTV conversion supporting up to 160 MHz pixel clock
|
Original
|
PDF
|
CH7021/CH7022
CH7021/CH7022
1600x1200
1080i
1080p
CH7021
CH7022A-BF
CH7022A-BF-TR
|
CH7317B-TF-i
Abstract: CH7317B-BF
Text: CH7317B Chrontel CH7317B SDVO1 / RGB DAC Features • • • • • • • • General Description Supporting analog RGB outputs for a display monitor Supporting maximum pixel rate of 165MP/s or graphics resolutions up to 1920x1200* High-speed SDVO1 1G~2Gbps AC-coupled serial
|
Original
|
PDF
|
CH7317B
CH7317B
165MP/s
1920x1200*
64-pin
CH7317B-BF
CH7317B-BF-I
CH7317B-BF-TR
CH7317B-TF-i
CH7317B-BF
|
HSYNC, VSYNC, DE
Abstract: 1466X768 CH7317B-TF 1360X768 Hsync Vsync convert
Text: CH7317B Chrontel CH7317B SDVO◊ / RGB DAC Features • • • • • • • • General Description Supporting analog RGB outputs for a display monitor Supporting maximum pixel rate of 165MP/s or graphics resolutions up to 1920x1200* High-speed SDVO◊ 1G~2Gbps AC-coupled serial
|
Original
|
PDF
|
CH7317B
165MP/s
1920x1200*
64-pin
CH7317B-TF
CH7317B-TF-TR
CH7317B-BF
HSYNC, VSYNC, DE
1466X768
1360X768
Hsync Vsync convert
|
CH7022A-TEF
Abstract: 2200x1125 CH7022A-BF SMPTE170 BT1358 832x624 tv tuner for crt monitor block diagram parts and function of crt t.v
Text: CH7021/CH7022 Chrontel CH7021/CH7022 SDTV / HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • General Description VGA to SDTV/EDTV/HDTV conversion supporting graphics resolutions up to 1600x1200
|
Original
|
PDF
|
CH7021/CH7022
CH7021/CH7022
1600x1200
1080i
1080p
CH7021
CH7021A-BF-TR
CH7022A-TEF
CH7022A-TEF-TR
2200x1125
CH7022A-BF
SMPTE170
BT1358
832x624
tv tuner for crt monitor block diagram
parts and function of crt t.v
|
Untitled
Abstract: No abstract text available
Text: CH7021A Chrontel Advance Information CH7021A SDTV / HDTV Encoder Features • • • • • • • • • • • • • • • • • • • • • • • • General Description VGA to SDTV/EDTV/HDTV conversion supporting graphics resolutions up to 1600x1200
|
Original
|
PDF
|
CH7021A
CH7021A
1600x1200
1080i
1080p
CH7021A-TEF
CH7021A-TEF-TR
|
MOA4 package specification
Abstract: MOA8 MOA6 M1A1 MX8810 MOA4 package specification picture M1A10 m1a2 MOA8 package specification
Text: INDEX MX8810 Motion-JPEG Real Time Video CODEC LSI Product Specification P/N:PM0363 REV. 1.0, AUG. 25, 1998 1 INDEX MX8810 1. OUTLINE Real Time Video Codec LSI is a LSI chip which can compress/decompress high performace still image and motion picture data. The method of Encode/Decode is based on JPEG, an international standard encode/decode method
|
Original
|
PDF
|
MX8810
PM0363
768x480
MOA4 package specification
MOA8
MOA6
M1A1
MX8810
MOA4 package specification picture
M1A10
m1a2
MOA8 package specification
|
ch7317B
Abstract: CH7317B-TF-i CH7317B-BF ch7317 JESD-30
Text: CH7317B Chrontel CH7317B SDVO◊ / RGB DAC Features • • • • • • • • General Description Supporting analog RGB outputs for a display monitor Supporting maximum pixel rate of 165MP/s or graphics resolutions up to 1920x1200* High-speed SDVO◊ 1G~2Gbps AC-coupled serial
|
Original
|
PDF
|
CH7317B
165MP/s
1920x1200*
64-pin
CH7317B
CH7317B-TF-i
CH7317B-BF
ch7317
JESD-30
|
Intel Developer Forum
Abstract: No abstract text available
Text: Intel Developer Forum Designing platform solutions plugfest August 31-September 4, 1998 Intel Developer Forum Developing DirectShow DVD Applications Steve Smiley SW Eng. Mgr. Kirk Dunsavage SW Eng. Intel Corporation Designing platform solutions plugfest August 31, 1998
|
Original
|
PDF
|
31-September
800x600
16-bit
YUV12
12bpp)
Intel Developer Forum
|
|
|
CH7317B-TF
Abstract: CH7317B CH7317B-TF-TR HSYNC, VSYNC, DE CH7317B-BF 1680x1050 FSDV MO-220 CH7317B-BF-TR VGA decoder circuit
Text: CH7317B Chrontel CH7317B SDVO◊ / RGB DAC Features • • • • • • • • General Description Supporting analog RGB outputs for a display monitor Supporting maximum pixel rate of 165MP/s or graphics resolutions up to 1920x1200* High-speed SDVO◊ 1G~2Gbps AC-coupled serial
|
Original
|
PDF
|
CH7317B
CH7317B
165MP/s
1920x1200*
64-pin
CH7317B-TF
CH7317B-TF-TR
CH7317B-BF
CH7317B-TF
CH7317B-TF-TR
HSYNC, VSYNC, DE
CH7317B-BF
1680x1050
FSDV
MO-220
CH7317B-BF-TR
VGA decoder circuit
|
CH7317B-TF
Abstract: CH7317B-BF 1280X768 1920x1200 Analog DAC CH7317B-TF-TR CH7317B WUXGA
Text: CH7317B Chrontel CH7317B SDVO◊ / RGB DAC Features • • • • • • • • General Description Supporting analog RGB outputs for a display monitor Supporting maximum pixel rate of 165MP/s or graphics resolutions up to 1920x1200* High-speed SDVO◊ 1G~2Gbps AC-coupled serial
|
Original
|
PDF
|
CH7317B
165MP/s
1920x1200*
64-pin
CH7317B-TF
CH7317B-TF-TR
CH7317B-BF
1280X768
1920x1200 Analog DAC
WUXGA
|
CH7317B-TF-i
Abstract: No abstract text available
Text: CH7317B Chrontel CH7317B SDVO◊ / RGB DAC Features • • • • • • • • General Description Supporting analog RGB outputs for a display monitor Supporting maximum pixel rate of 165MP/s or graphics resolutions up to 1920x1200* High-speed SDVO◊ 1G~2Gbps AC-coupled serial
|
Original
|
PDF
|
CH7317B
CH7317B
165MP/s
1920x1200*
64-pin
conneCH7317B-TF-I-TR
CH7317B-BF
CH7317B-BF-I
CH7317B-TF-i
|
V9990
Abstract: S0X3 yamaha v9990 CSR BC8 yamaha fc4 A4032 scax1 csr bc7 KA17/127BPV1MSTH yamaha fc5
Text: YAMAHA L S i E-VDP-III APPLICATION MANUAL YAMAHA V 9990 APPLICATION MANUAL CATALOG No. : LSI-2499903 1992. 09 NOTICES YAMAHA reserves the right to make changes in specifications in order to improve performance without notice. The application circuit herein are presented only as an example.
|
OCR Scan
|
PDF
|
V9990
LSI-2499903
CA95131
S0X3
yamaha v9990
CSR BC8
yamaha fc4
A4032
scax1
csr bc7
KA17/127BPV1MSTH
yamaha fc5
|
jpeg decode image
Abstract: MX881 MX8810 "decompression compression" M0A0-M0A13
Text: ^S Ü Ü T M X 881 O Motion-JPEG Real Time Video CODEC LSI Product Specification P/N:PM 0363 REV. 1.0, AU G . 2 5 ,1 9 9 8 1 MX881 O 1. OUTLINE Real Time Video Codec LSI is a LSI chip which can compress/decompress high performace still image and motion picture data. The method of Encode/Decode is based on JPEG, an international standard encode/decode method
|
OCR Scan
|
PDF
|
MX881
PM0363
768x480
jpeg decode image
MX8810
"decompression compression"
M0A0-M0A13
|