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    74LS30 Search Results

    74LS30 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS30FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS30P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    SN74LS30DR Texas Instruments 8-input positive-NAND gates 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS30D Texas Instruments 8-input positive-NAND gates 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS30NSR Texas Instruments 8-input positive-NAND gates 14-SO 0 to 70 Visit Texas Instruments Buy
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    74LS30 Price and Stock

    Texas Instruments SN74LS30DR

    IC GATE NAND 1CH 8-INP 14SOIC
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    DigiKey SN74LS30DR Cut Tape 2,245 1
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    Rochester Electronics SN74LS30DR 17,329 1
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    Chip 1 Exchange SN74LS30DR 300
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    Texas Instruments SN74LS30N

    IC GATE NAND 1CH 8-INP 14DIP
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    DigiKey SN74LS30N Tube 216 1
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    Mouser Electronics SN74LS30N 305
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    Newark SN74LS30N Bulk 1
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    Rochester Electronics SN74LS30N 8,785 1
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    TME SN74LS30N 284 1
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    Chip1Stop SN74LS30N Tube 1,018
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    SN74LS30N 1
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    Texas Instruments SN74LS30D

    IC GATE NAND 1CH 8-INP 14SOIC
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    DigiKey SN74LS30D Tube 189 1
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    Rochester Electronics SN74LS30D 1,042 1
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    TME SN74LS30D 43 1
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    onsemi DM74LS30N

    IC GATE NAND 1CH 8-INP 14MDIP
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    DigiKey DM74LS30N Tube 25
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    Rochester Electronics LLC SN74LS30D

    IC GATE NAND 1CH 8-INP 14SOIC
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    DigiKey SN74LS30D Tube 517
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    74LS30 Datasheets (17)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LS30 Fairchild Semiconductor 8-Input NAND Gate Original PDF
    74LS30 Hitachi Semiconductor 8-input Positive NAND Gate Original PDF
    74LS30 National Semiconductor 8-Input NAND Gate Original PDF
    74LS30 On Semiconductor 8-INPUT NAND GATE Original PDF
    74LS30 Texas Instruments 8-INPUT POSITIVE-NAND GATES Original PDF
    74LS30 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    74LS30 Raytheon Positive-NAND Gates, Hex Inverters Scan PDF
    74LS30 Signetics Eight-Input NAND Gate Scan PDF
    74LS30 Signetics Eight-Input NAND Gate Scan PDF
    74LS30 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74LS301 Signetics Bipolar Memory IC Data Book 1982 Scan PDF
    74LS30C Unknown TTL Data Book 1980 Scan PDF
    74LS30DC Fairchild Semiconductor 8-Input NAND Gate Scan PDF
    74LS30FC Fairchild Semiconductor 8-Input NAND Gate Scan PDF
    74LS30N Texas Instruments 8-INPUT POSITIVE-NAND GATES Original PDF
    74LS30P Unknown TTL Data Book 1980 Scan PDF
    74LS30PC Fairchild Semiconductor 8-Input NAND Gate Scan PDF

    74LS30 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    751A-02

    Abstract: TTL 74ls30 FAST AND LS TTL motorola ceramic dual in-line case 74ls30 datasheet
    Text: SN54/74LS30 8-INPUT NAND GATE 8-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD


    Original     		PDF SN54/74LS30 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD 751A-02 TTL 74ls30 FAST AND LS TTL motorola ceramic dual in-line case 74ls30 datasheet

    74LS30

    Abstract: TTL 74ls30 751A-02 truth table nand gate
    Text: SN54/74LS30 8-INPUT NAND GATE 8-INPUT NAND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD


    Original     		PDF SN54/74LS30 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD 74LS30 TTL 74ls30 751A-02 truth table nand gate

    741s

    Abstract: CI 741S DN74LS30 MA161
    Text: LS TTLDN74LS Series 74LS30 74LS30 £>to 7a LS 30 8 - input P o sitiv e N AN D Gates B Description P-1 DN 74LS30 contains one 8-input positive isolation NAND gate circuit. • Features • • • • Low pow er consum ption Pd = 2.5m W typical High speed ( t pd = 1 In s typical)


    OCR Scan     		PDF TTLDN74LS DN74LS30 DN74LS30 14-pin SO-14D) DN74LS CL-15pF, MA161. 741s CI 741S MA161

    TTL LS 7406

    Abstract: el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I Vcc E RRRRRRRFl LiJ ikj Lil l±J UJ LsJ IzJ GND LU D11


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7406 el 7406 74l804 ls 7404 7404 ls 74114 ic 74132 IC 7404 IC TTL 7402 TTL IC 7405

    74LS30PC

    Abstract: 74LS30 74LS30P 7430DC
    Text: 30 CO NNECTIO N DIAGRAMS PINO UT A 54/7430 o/ô //7 54H/74H30 ò /q /s o W54S/74S30/ , \/54LS/74LS30 O Vcc d 8-INPUT NAND GATE E E E m Œ ]Ö ]N C [7 I] 1 3 ]n C 13 U gnd ORDERING CODE: See Section 9 PIN PKGS OUT CO M M ERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%,


    OCR Scan     		PDF 54H/74H30 W54S/74S30/ \/54LS/74LS30 7430PC, 74H30PC 74S30PC, 74LS30PC 7430DC, 74H30DC 74S30DC, 74LS30 74LS30P 7430DC

    truth table NAND gate 74

    Abstract: 74LS30 751A-02
    Text: M MOTOROLA, SN54/74LS30 8-INPUT NAND GATE 8-tNPUT N A N D GATE vcc fui r nji nyi nói nn LOW POWER SCHOTTKY it i J SUFFIX CERAMIC CASE 632-08 14 GND 1 N SUFFIX PLASTIC CASE 646-06 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN SN74LSXXD


    OCR Scan     		PDF SN54/74LS30 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD truth table NAND gate 74 74LS30 751A-02

    Untitled

    Abstract: No abstract text available
    Text: G054/74LS30 8-INPUT POSITIVE NAND GATE Description This device contains a single 8-input NAND gate and performs the following Boolean functions in positive logic. Y = A • Bj C E • F_G _H or Y = Â + B + C + D + Ë + F + 3 + H Function Table O U TP U T


    OCR Scan     		PDF G054/74LS30 GD54/74LS30

    PIN CONFIGURATION OF 74LS30

    Abstract: TTL 7430 7430 ic IC 7430 7430 Eight-Input NAND Gate 7430 pin configuration 7430 74ls30 equivalent 8 input nand gate 7430
    Text: Signetics I 7430, LS30 Gates Eight-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7430 11ns 2mA 74LS30 11ns 0.5mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5%; Ta = 0°C to +70°C PACKAGES


    OCR Scan     		PDF 74LS30 N7430N, N74LS30N N74LS30D WF07570S PIN CONFIGURATION OF 74LS30 TTL 7430 7430 ic IC 7430 7430 Eight-Input NAND Gate 7430 pin configuration 7430 74ls30 equivalent 8 input nand gate 7430

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series 74LS30 DN741S30 £1074 IS 3 0 8 - input Positive NAND Gates H Description P-1 DN 74LS30 contains one 8-input positive isolation NAND gate circuit. • Features • • • • Low pow er consum ption P^ = 2.5mW typical High speed ( t pd = 1 In s typical)


    OCR Scan     		PDF DN74LS DN74LS30 DN741S30 74LS30 14-pin S0-14D) MA161.

    TTL LS 7407

    Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 D9 54S/74S134 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I E RRRRRRRFl li lli lli lli J lill ill ill iJGND


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7407 CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02

    74LS30

    Abstract: 74ls gate symbols 54LS 74LS
    Text: GD54/74LS30 8-INPUT POSITIVE NAND GATE Description This device contains a single 8-input NAND gate and performs the following Boolean functions in positive logic. Y = A B C - D - E I - , ü _H or _ Y = Â + B+ C + D+ Ë + F + G + H Function Table O U TP U T


    OCR Scan     		PDF GD54/74LS30 74LS30 74ls gate symbols 54LS 74LS

    Untitled

    Abstract: No abstract text available
    Text: M M O T O R O L A SN54/74LS30 _k l r r n r*i 8-INPUT N A N D G ATE L i LiJ LU lil -L iJ Lj L I LOW PO W ER SCM O TTKY J Suffix — Case 632*08 (Ceramic) N Suffix — Case 646-06 (Plastic) GUARANTEED OPERATING RANGES S YM B O L MIN TYP MAX UNIT V cc Supply Voltage


    OCR Scan     		PDF SN54/74LS30

    TTL 74ls30

    Abstract: 74LS30 truth table NAND gate 74 all gate ic data 74
    Text: fò MOTOROLA SN54/74LS30 8-INPUT NAND GATE 8-IN P U T NAND GATE Vcc LOW POWER SCHOTTKY ini [ïïi rmrmr^i m rn J SUFFIX s C E R A M IC C A SE 632-08 LU LU LU LU LU LU Ll I GND N SUFFIX .J ^ P ÏÏ oüiSE. D SUFFIX soie C A SE 751A-02 5 ORDERING INFORMATION


    OCR Scan     		PDF SN54/74LS30 51A-02 SN54/74LS30 TTL 74ls30 74LS30 truth table NAND gate 74 all gate ic data 74

    7430 ic

    Abstract: IC 7430 PIN CONFIGURATION OF 74LS30 7430 LS 7430
    Text: Signelics | 74 3 0 , LS30 Gates Eight-Input NAND Gate Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL 7430 11ns 2mA 74LS30 11ns 0.5mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to + 70°C PACKAGES


    OCR Scan     		PDF 74LS30 N7430N, N74LS30N N74LS30D WF07570S 7430 ic IC 7430 PIN CONFIGURATION OF 74LS30 7430 LS 7430

    74LS30PC

    Abstract: 7430DC 7430PC 74H30DC 74S30PC 5430DM 74H30PC 74LS30DC 74S30DC
    Text: 30 C O N N E C T IO N D IA G R A M S P IN O U T A 54/7430 o/ô //7 54H/74H30 / ;, W54S/74S30/ , \/54LS/74LS30 ^ 8 -IN P U T N A N D G A T E O ' O R D E R IN G C O D E : See S e c tio n 9 PIN PKG S OUT C O M M E R C IA L G R AD E M IL IT A R Y G R AD E V cc = + 5 .0 V ±5%,


    OCR Scan     		PDF 54LS/74LS30 7430PC, 74H30PC 74S30PC, 74LS30PC 7430DC, 74H30DC 74S30DC, 74LS30DC 5430DM, 74LS30PC 7430DC 7430PC 74S30PC 5430DM 74S30DC

    S54LS30F

    Abstract: 74LS30 N7430F N7430N N74H30F N74H30N N74LS30F N74LS30N S5430F S54H30F
    Text: PIN CONFIGURATIONS 54/7430 54H/74H30 54LS/74LS30 ORDERING CODE See Section 9 for further Package and Ordering Information. C O M M E R C IA L RANGES “ 5V - 5%; T A = 0°C to *70°C PACKAGES PIN CON F. P lastic DIP Fig. A Fig. A N7430N • N74H30N 74LS30N


    OCR Scan     		PDF 54H/74H30 54LS/74LS30 N7430N N74H30N N74LS30N N7430F N74H30F N74LS30F S5430F S54H30F S54LS30F 74LS30 N7430F N7430N N74LS30N S5430F

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS30 8-INPUT POSITIVE NAND GATE Description This device contains a single 8-input NAND gate and performs the following Boolean functions in positive logic. Y = A B C D E F G H or Y=Â+B+C+D+Ë+F+S+H Function Table OUTPUT INPUTS A THRU H Y All inputs H


    OCR Scan     		PDF GD54/74LS30

    TTL LS 7407

    Abstract: TTL 7427 TTL 7402 LS 7430 LS 7402 74LS02 74LS30 ttl 7407 d1554 TTL 74s02
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D7 54/7430, 54H/74H30 54S/74S30, 54LS/74LS30 Vcc NC r r r NC r D8 54S/74S133, 54LS/74LS133 Vcc NC r fi fi Ili ill HI Li Lil lil GND LzJ R R R R F IR R F I 5T5 R Fl R R R FI FI aia LU 111 111 Li] lij lil L J


    OCR Scan     		PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7407 TTL 7427 TTL 7402 LS 7430 LS 7402 74LS02 74LS30 ttl 7407 d1554 TTL 74s02

    hd74lsoop

    Abstract: 74LSOO 74LSOO AND gate A2210
    Text: H D 74LS30. 8-input Positive NAND Gate •PIN ARRANGEM ENT ■CIRCUIT S C H EM A T IC ■ E L E C T R IC A L C H A R A C T E R IS T IC S Ta= - 2 0 - + 75°C Item T est Conditions Symbol VlH Input voltage V lL VOH Vcc = 4.75V , V,/l = 0 .8 V ,/o h = -4 0 0 M


    OCR Scan     		PDF QQ14CI14 DG-14 06max 20-IU8 OG-16 DG-24 hd74lsoop 74LSOO 74LSOO AND gate A2210

    LS30

    Abstract: PIN CONFIGURATION OF 74LS30 2313m TTL 7430 7430 Eight-Input NAND Gate 74LS TTL 1N3064 1N916 74LS 74LS30
    Text: Signetics | 7430, LS30 Gates Eight-Input NAND Gate Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY 7430 11ns 2mA 74LS30 11ns 0.5mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T a = 0°C to + 70*0 PACKAGES


    OCR Scan     		PDF 74LS30 N7430N, N74LS30N N74LS30D LS30 PIN CONFIGURATION OF 74LS30 2313m TTL 7430 7430 Eight-Input NAND Gate 74LS TTL 1N3064 1N916 74LS

    N74LS301D

    Abstract: No abstract text available
    Text: Philips Components-Signetics 74LS301 Document No. 8 5 3 -0 1 2 7 ECN No. 8 64 8 7 Date of Issue N ove m b e r 11, 1986 Status P ro du ct S p ecification 256-bit TTL bipolar RAM M em ory P ro du cts PIN CONFIGURATION DESCRIPTION FEATURES The 74LS301 is a R ead/W rite m em ory


    OCR Scan     		PDF 74LS301 256-bit 74LS301 N74LS301D

    74LS30PC

    Abstract: No abstract text available
    Text: NATIONAL SEMICOND -CLOGIO G5E D I b 5 0 1 1 2 3 ou CO NN ECTIO N DIAGRAMS PINO UT A 54/7430 54H/74H30 54S/74S30 54LS/74LS30 8-INPUT NAND GATE ORDERING CODE: See Section 9 PIN PKGS OUT CO M M ERC IAL GRADE M ILITARY GRADE V cc = +5.0 V ±5%, T a = 0 °C to +70° C


    OCR Scan     		PDF 54H/74H30 54S/74S30 54LS/74LS30 7430PC, 74H30PC 74S30PC, 74LS30PC 7430DC, 74H30DC 74S30DC,

    74LS301

    Abstract: EE-S5 LS301 N74LS301 N74LS301F N74LS301N S54LS301 S54LS301F S54LS301G S54LS301W
    Text: MAY 1982 BIPOLAR M E M O R Y DIVISION 256-BIT TTL RAM 256 x 1 54/74LS301 (P .C .) DESCRIPTION + 7 5°C ) a n d th e m ilit a r y t e m p e ra tu r e ra n g e ( - 5 5 °C t o + 125°C). T h e y a re s p e c ifie d as: T h e 54/7 4 L S 3 0 1 is a R e a d /W r ite m e m o ry


    OCR Scan     		PDF 256-BIT 54/74LS301 54/74LS301 54/7ite 74LS301 EE-S5 LS301 N74LS301 N74LS301F N74LS301N S54LS301 S54LS301F S54LS301G S54LS301W

    DN74LS30

    Abstract: MA161
    Text: !» LSTTL DN74LS Series 74LS30 74LS30 8-input P ositive NAND Gates • Description P-1 D N 74LS30 contains one 8-input positive isolation NAND gate circuit. ■ Features • • • • Low pow er consum ption P<j = 2.5mW typical High speed ( t pd = 1 In s typical)


    OCR Scan     		PDF DN74LS DN74LS30 DN74LS30 14-pin S0-140) CL-15pF, MA161