Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    74LS138 3 TO 8 DECODER PIN Search Results

    74LS138 3 TO 8 DECODER PIN Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet
    CS-DSDMDB15MM-025 Amphenol Cables on Demand Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft Datasheet
    CS-DSDMDB25MM-010 Amphenol Cables on Demand Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft Datasheet

    74LS138 3 TO 8 DECODER PIN Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    block diagram of 74LS138 3 to 8 decoder

    Abstract: 74LS138 3 to 8 decoder notes block diagram of 74LS138 1 line to 16 line MM74HCT138N mm54hct138/mm74hct138 54LS138 74HCT 74LS138 C1995 MM54HCT138
    Text: MM54HCT138 MM74HCT138 3-to-8 Line Decoder General Description the 54LS138 74LS138 All inputs are protected from damage due to static discharge by diodes to VCC and ground MM54HCT MM74HCT devices are intended to interface between TTL and NMOS components and standard CMOS


    Original     		PDF MM54HCT138 MM74HCT138 54LS138 74LS138 MM54HCT MM74HCT MM74HCT138 block diagram of 74LS138 3 to 8 decoder 74LS138 3 to 8 decoder notes block diagram of 74LS138 1 line to 16 line MM74HCT138N mm54hct138/mm74hct138 74HCT C1995

    74LS138

    Abstract: 74LS138 3 to 8 decoder Pin 74LS138 pin diagram ls138 74LS138 3 to 8 decoder notes pin for 74LS138 TTL 74ls138 Truth table of 1 to 16 demultiplexer of 74LS138 3 to 8 decoder 74ls138 truth table
    Text: SN54/74LS138 1-OF-8 DECODER/ DEMULTIPLEXER The LSTTL / MSI SN54 / 74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32


    Original     		PDF SN54/74LS138 74LS138 1-of-24 LS138 1-of-32 LS138s 74LS138 3 to 8 decoder Pin 74LS138 pin diagram 74LS138 3 to 8 decoder notes pin for 74LS138 TTL 74ls138 Truth table of 1 to 16 demultiplexer of 74LS138 3 to 8 decoder 74ls138 truth table

    74LS138 3 to 8 decoder notes

    Abstract: 74LS138 DATASHEET motorola 74ls138 TTL 74ls138 FUNCTIONAL APPLICATION OF 74LS138 74LS138 data sheet 74LS138 1 to 8 decoder notes 74LS138 application note 74ls138 LS138 Motorola
    Text: SN54/74LS138 1-OF-8 DECODER/ DEMULTIPLEXER The LSTTL / MSI SN54 / 74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32


    Original     		PDF SN54/74LS138 74LS138 1-of-24 LS138 1-of-32 LS138s 74LS138 3 to 8 decoder notes 74LS138 DATASHEET motorola 74ls138 TTL 74ls138 FUNCTIONAL APPLICATION OF 74LS138 74LS138 data sheet 74LS138 1 to 8 decoder notes 74LS138 application note LS138 Motorola

    intel 8085 microprocessor

    Abstract: 8085 memory organization 8085 microprocessor 74LS373 Decoder latch used for 8085 ic 74ls138 8085 clock circuit 8085 hardware reset 74LS138 decoder 8085 microprocessor application
    Text: Designing with the HDSP-211X Smart Display Family Application Note 1033 Introduction Hewlett-Packard’s smart alphanumeric display, the HDSP-211X, is built to optimize the user’s display design. Each HDSP-211X has an on-board CMOS IC which displays eight alphanumeric characters. The


    Original     		PDF HDSP-211X HDSP-211X, intel 8085 microprocessor 8085 memory organization 8085 microprocessor 74LS373 Decoder latch used for 8085 ic 74ls138 8085 clock circuit 8085 hardware reset 74LS138 decoder 8085 microprocessor application

    8085 microprocessor

    Abstract: intel 8085 microprocessor IC 74ls138 8085 memory organization 74LS373 Decoder 8085 microprocessor Datasheet 8085 microprocesor ic 74ls138 information interfacing of ram with 8085 intel 8085
    Text: Designing with the Avago Technologies HDSP-211x Smart Display Family Application Note 1033 Introduction Avago Technologies’ smart alphanumeric display, the HDSP-211x, is built to optimize the user’s display design. Each HDSP-211x has an on-board CMOS IC which


    Original     		PDF HDSP-211x HDSP-211x, HDSP-211x 5988-5632EN 8085 microprocessor intel 8085 microprocessor IC 74ls138 8085 memory organization 74LS373 Decoder 8085 microprocessor Datasheet 8085 microprocesor ic 74ls138 information interfacing of ram with 8085 intel 8085

    block diagram of 74LS138 3 to 8 decoder

    Abstract: 74LS138 3 to 8 decoder notes 12C508 74LS138 DATASHEET block diagram of 74LS138 1 line to 16 line 74LS138 application note PIC12C508 of 74LS138 3 to 8 decoder 74LS138 pin diagram 74LS138 data sheet
    Text: Consumer Appliance, Widget, Gadget SPF Monitor Author: APPLICATION OPERATION: Lloyd Lee Boonsboro, Maryland email: dale@fred.net INTRODUCTION: With the growing health concerns of ultraviolet exposure, this application’s intent is to suggest a UV monitor based on the PIC12C508. This discussion does not


    Original     		PDF PIC12C508. PIC12C508 TSL230 74LS138 DS40160A/5 016-page NJM78L05A 74LS138 block diagram of 74LS138 3 to 8 decoder 74LS138 3 to 8 decoder notes 12C508 74LS138 DATASHEET block diagram of 74LS138 1 line to 16 line application note PIC12C508 of 74LS138 3 to 8 decoder 74LS138 pin diagram 74LS138 data sheet

    and gate 74LS138

    Abstract: SP74HCT138N TTL 74ls138 74LS138 LOGIC OF 74LS138 pin for 74LS138 74LS138 pin configuration SP74HCT138 SP74HCT138J 74LS138 pin
    Text: SPI •jri- SP74HCT138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B ■ Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CM OS technology


    OCR Scan     		PDF SP74HCT138 74LS138 SP74HCT138 74LS138. 20/iA and gate 74LS138 SP74HCT138N TTL 74ls138 74LS138 LOGIC OF 74LS138 pin for 74LS138 74LS138 pin configuration SP74HCT138J 74LS138 pin

    Untitled

    Abstract: No abstract text available
    Text: s e m i c o n d u c t o r Revised February 1999 MM74HCT138 3-to-8 Line Decoder the 74LS138. All inputs are protected from damage due to static discharge by diodes to Vc c and ground. General Description The MM74HCT138 decoder utilizes advanced silicon-gate


    OCR Scan     		PDF MM74HCT138 74LS138. MM74HCT138 MM74HCT

    l381

    Abstract: and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138
    Text: y SP74SC138 DECODER/DEMULTIPLEXER PIN CONFIGURATION A FEATURES B • Designed for high performance memory decoders in microprocessor systems ■ 3 to 8 line decoders include 3 enable inputs ■ Pin com patible with 74LS138 ■ SPI CMOS technology ■ Full TTL interface capability


    OCR Scan     		PDF SP74SC138 74LS138 SP74SC138 74LS138. 400//A l381 and gate 74LS138 74ls138 function 74LS138 pin for 74LS138 74LS138 pin diagram SP74SC138F SP74SC138N pin diagram demultiplexer 74LS138

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series DN74LS138 DN74LS138 M 741^ 3^ 3 -lin e to 8 -lin e Decoders / Demultiplexers • Description P-2 D N 74LS138 is a 3-bit decimal to octal decoder/dem ulti­ plexer w ith enable inputs. ■ Features • • Three types o f enable inputs


    OCR Scan     		PDF DN74LS DN74LS138 DN74LS138 74LS138

    Ic 74hc138 logic diagram

    Abstract: No abstract text available
    Text: Revised February 1999 S E M IC Q N D U C T O R T M MM74HC138 3-to-8 Line Decoder The decoder’s outputs can drive 10 low power Schottky TTL equivalent loads, and are functionally and pin equiva­ lent to the 74LS138. All inputs are protected from damage due to static discharge by diodes to V qq and ground.


    OCR Scan     		PDF MM74HC138 74LS138. MM74HC138 Ic 74hc138 logic diagram

    TTL 74ls138

    Abstract: No abstract text available
    Text: SANYO SEM ICONDUCTOR CORP 7 cH 7 a 7 b OOIOERM 57Ô « T S A J S3E ]> T- 6 7 - 2 \-SS MLC74HC138AM CMOS High-Speed Standard Logic 3 to 8-Line Decoder Features • The MLC74HC138AM is 3-to-8 decoders. •Uses CMOS silicon gate process technology to achieve operating speeds similar to LS - TTL 74LS138


    OCR Scan     		PDF MLC74HC138AM MLC74HC138AM 74LS138) 54LS/74LS TTL 74ls138

    Untitled

    Abstract: No abstract text available
    Text: January 1988 MM54HCT138/MM74HCT138 3-to-8 Line Decoder General Description the 54LS138/74LS138. All inputs are protected from dam­ age due to static discharge by diodes to Vcc and ground. MM54HCT/MM74HCT devices are intended to interface be­ tween TTL and NMOS components and standard CMOS


    OCR Scan     		PDF MM54HCT138/MM74HCT138 54LS138/74LS138. MM54HCT/MM74HCT

    Untitled

    Abstract: No abstract text available
    Text: Am25LS138 • Am54LS/74LS138 3-Line To 8-Line Decoder/Demultiplexer D IS T IN C T IV E C H A R A C T E R IS T IC S L O G IC D IA G R A M • Inverting and non-inverting enable inputs • A m 2 5 L S devices offer the following improvements over Am 54/74LS


    OCR Scan     		PDF Am25LS138 Am54LS/74LS138 54/74LS Am25LS/54 LS/74LS138

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS138 3-TO-8-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Incorporate 3 Enable Inputs to Simplify Cascading AND/OR Data Reception Schottky Clamped for High Performance


    OCR Scan     		PDF GD54/74LS138

    M02S7S7

    Abstract: No abstract text available
    Text: GD54/74LS138 3-TO-8-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems • Incorporate 3 Enable Inputs to Simplify Cascading AND/OR Data Reception • Schottky Clamped for High Performance


    OCR Scan     		PDF GD54/74LS138 Q004225 M02S7S7

    pin diagram of ic 74ls138

    Abstract: 74LS138 pin configuration ic 74ls138 74LS138 pin diagram 74ls138 function 74LS138 LOGIC OF 74LS138 74LS138 3 to 8 decoder Pin pin for 74LS138 74ls138 3-8
    Text: 74LS138, S138 Signetics Decoders/Demultiplexers 1-Of-8 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Direct replacement for Intel 3205 74LS138


    OCR Scan     		PDF 74LS138, 74LS138 74S138 N74S13BN, N74LS138N N74LS138D, N74S138D 1N916, 1N3064, 500ns pin diagram of ic 74ls138 74LS138 pin configuration ic 74ls138 74LS138 pin diagram 74ls138 function LOGIC OF 74LS138 74LS138 3 to 8 decoder Pin pin for 74LS138 74ls138 3-8

    LOGIC OF 74LS138

    Abstract: 74LS138 3 to 8 decoder notes 74LS138 pin configuration 74LS138 pin for 74LS138 74LS138 3 to 8 decoder Pin 74LS138 3 to pin configuration
    Text: Signetics 74LS138, S138 Decoders/Demultiplexers 1-Of-8 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Multiple input enable for easy expansion • Ideal for memory chip select decoding • Direct replacement for Intel 3205 TYPICAL PROPAGATION


    OCR Scan     		PDF 74LS138, 74LS138 74S138 N74S138N, N74LS138N N74LS138D, N74S138D 1N916, 1N3064, 500ns LOGIC OF 74LS138 74LS138 3 to 8 decoder notes 74LS138 pin configuration pin for 74LS138 74LS138 3 to 8 decoder Pin 74LS138 3 to pin configuration

    74ls138 truth table

    Abstract: 74LS138 74 LS 138 DECODER connection for 74LS138 74LS138 3 to 8 decoder Pin demultiplexer 3 to 8 truth table 74ls138 demultiplexer LS138 LOGIC OF 74LS138 of 74LS138 3 to 8 decoder
    Text: g MOTOROLA SN54/74LS138 1-0F-8 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/ Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel ex­


    OCR Scan     		PDF SN54/74LS138 1-of-24 LS138 1-of-32 LS138s SN54/74LS138 74ls138 truth table 74LS138 74 LS 138 DECODER connection for 74LS138 74LS138 3 to 8 decoder Pin demultiplexer 3 to 8 truth table 74ls138 demultiplexer LOGIC OF 74LS138 of 74LS138 3 to 8 decoder

    LOGIC OF 74LS138

    Abstract: pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin
    Text: 74LS138, S138 Signetics Decoders/Dem ultiplexers 1-Of-8 D e co d e r/D e m u ltip le xe r Product Specification L o g ic P rod ucts FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding


    OCR Scan     		PDF 74LS138, 1-of-32 1N916, 1N3064, 500ns LOGIC OF 74LS138 pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin

    CI 74LS138

    Abstract: 74LS138 pin configuration TTL 74ls138 74ls138 function 74 LS 138 DECODER intel 3205 74ls138 74l5138 of 74LS138 3 to 8 decoder 74LS138 ttl
    Text: Signelics 74LS138, S138 Decoders/Demultiplexers 1 -O f - 8 D e c o d e r /D e m u ltip le x e r Product Specification L o g ic P ro d u c ts FEATURES • Demultiplexing capability • Multiple input enable fo r easy expansion TYPE 74LS138 74S138 • Ideal fo r m em ory chip select


    OCR Scan     		PDF -of-32 1N916, 1N3064, 500ns CI 74LS138 74LS138 pin configuration TTL 74ls138 74ls138 function 74 LS 138 DECODER intel 3205 74ls138 74l5138 of 74LS138 3 to 8 decoder 74LS138 ttl

    transistor d133

    Abstract: Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 transistor d133 Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491

    7448 decoder

    Abstract: ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 G N D = Pin 8 Vcc = Pin 16 G N D = Pin 8


    OCR Scan     		PDF 74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 7448 decoder ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448

    74LS138PC

    Abstract: No abstract text available
    Text: 138 CONNECTION DIAGRAM PINOUT A & 54S/74S138 54LS/74LS138 bi f rC 1-0F-8 DECODER/DEMULTIPLEXER D E S C R IP TIO N — The '138 is a high speed 1-of-8 decoder/dem ultiplexer. This device is ideally suited for high speed bipolar memory chip select ad­ dress decoding. The m ultiple input enables allow parallel expansion to a


    OCR Scan     		PDF 54S/74S138 54LS/74LS138 1-Of-24 1-of-32 74LS138PC