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    74LS 280 EQUIVALENT Search Results

    74LS 280 EQUIVALENT Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMP89FS60AUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/LQFP64-P-1010-0.50E Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS63AUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/LQFP52-P-1010-0.65 Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS60BFG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/P-LQFP64-1414-0.80-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS63BUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/P-LQFP52-1010-0.65-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMP89FS62AUG Toshiba Electronic Devices & Storage Corporation 8-bit Microcontroller/Processing Performance Equivalent to a 16-bit MCU/LQFP44-P-1010-0.80A Visit Toshiba Electronic Devices & Storage Corporation

    74LS 280 EQUIVALENT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MC14507B

    Abstract: 1a0 diode 74LS CD4030A CD4070BM
    Text: MICROCIRCUIT DATA SHEET Original Creation Date: 10/12/95 Last Update Date: 06/16/98 Last Major Revision Date: 03/05/98 MNCD4070BM-X REV 1A0 QUAD 2-INPUT EXCLUSIVE-OR GATE General Description Employing complementary MOS CMOS transistors to achieve wide power supply operating


    Original     		PDF MNCD4070BM-X M0002796 MC14507B 1a0 diode 74LS CD4030A CD4070BM

    MNCD4001BM-X

    Abstract: 74LS CD4001BM cd4001bmw883
    Text: MICROCIRCUIT DATA SHEET Original Creation Date: 10/05/95 Last Update Date: 06/16/98 Last Major Revision Date: 03/03/98 MNCD4001BM-X REV 1A0 QUAD 2-INPUT NOR BUFFERED B SERIES GATE General Description These quad gates are monolithic complementary MOS CMOS integrated circuits constructed


    Original     		PDF MNCD4001BM-X CD4001BM CD4001BMJ/883 CD4001BMW/883 M0002787 RETS4001BX MNCD4001BM-X 74LS CD4001BM cd4001bmw883

    CD40106

    Abstract: 5962-8550101CA cd40106bmw CD40106BMW equivalent mm74c14 equivalent CD40106 DATASHEET CD40106 PIN OUT CD40106B CD40106BM MC14584B
    Text: MICROCIRCUIT DATA SHEET Original Creation Date: 10/05/95 Last Update Date: 06/16/98 Last Major Revision Date: 03/05/98 MNCD40106BM-X REV 1A0 HEX SCHMITT TRIGGER General Description The CD40106B Hex Schmitt Trigger is a monolithic complementary MOS CMOS integrated


    Original     		PDF MNCD40106BM-X CD40106B CD40106BM CD40106BMJ/883* CD40106BMW/883 M0002797 CD40106 5962-8550101CA cd40106bmw CD40106BMW equivalent mm74c14 equivalent CD40106 DATASHEET CD40106 PIN OUT CD40106BM MC14584B

    7486 pin configuration

    Abstract: 74LS 7486 TTL 7486 7486 TTL 7486 signetics
    Text: Signetics I 7486, LS86, S86 Gates Quad Two-Input Exclusive-OR Gate Product Specification Logic Products TYPICAL SUPPLY CURRENT TOTAL TYPICAL PROPAGATION DELAY TYPE 7486 14ns 30mA 74LS86 10ns 6.1mA 74S86 7ns 50mA ORDERING CODE COMMERCIAL RANGE VCc = 5V ±5% ; T A = 0°C to + 70°C


    OCR Scan     		PDF 74LS86 74S86 N7486N, N74LS86N, N74S86N N74LS86D, N74S86D 40juA 7486 pin configuration 74LS 7486 TTL 7486 7486 TTL 7486 signetics

    7402 pin configuration

    Abstract: TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not
    Text: 7402, LS02, S02 Signetics Gates Quad Two-Input NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7402 10ns 11mA 74LS02 10ns 2.2mA 74S02 3.5ns 22mA ORDERING CODE COMMERCIAL RANGE Vcc = 5V +5 % ; T a = 0°C to + 7 0 “C


    OCR Scan     		PDF 74LS02 74S02 N7402N, N74LS02N, N74S02N N74LS02D, N74S02D 10Sul 10LSul wfc7570s 7402 pin configuration TTL 7402 7402 TTL specification of 74ls02 7402 nor 7402 signetics 7402 NOR gate 74LS02 pin configuration 7402 7402 quad 2 input not

    74L5373

    Abstract: 74L5374 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374 pin configuration 74LS374 74LS373 74LS373 pin configuration 74S373 745373 74S374
    Text: Signetics 74LS373, 74LS374, S373, S374 Latches/Flip-Flops '373 Octal Transparent Latch With 3-State Outputs '374 Octal D Flip-Flop With 3-State Outputs Logic Products Product Specification FEATURES • 8-bit transparent latch — '373 • 8-bit positive, edge-triggered


    OCR Scan     		PDF C006830S 1N916, 1N3064, 500ns 74L5373 74L5374 74LS373 PIN CONFIGURATION AND SPECIFICATIONS 74LS374 pin configuration 74LS374 74LS373 74LS373 pin configuration 74S373 745373 74S374

    7485 logic diagram

    Abstract: 7485 comparator function table comparator 7485 7485 4 bit comparator function table ttl 7485 comparator 74ls series logic family 7485 4 bit comparator 3 bit magnitude comparator 7485 74s85 L1122
    Text: 7485, LS85, S85 Signetics Comparators 4-Bit Magnitude Comparator Product Specification Logic Products FEATURES • Magnitude comparison of any binary words • Serial or parallel expansion without extra gating • Use 74S85 for very high speed comparisons


    OCR Scan     		PDF 74S85 1N916, 1N3064, 500ns 500ns 7485 logic diagram 7485 comparator function table comparator 7485 7485 4 bit comparator function table ttl 7485 comparator 74ls series logic family 7485 4 bit comparator 3 bit magnitude comparator 7485 L1122

    74194 circuit

    Abstract: 74194 function table 74194 shift register 74194 logic diagram LS194A 74194 universal shift register 74194 pin diagram LS 74194 74S194 74194 design and application shift register
    Text: 74194 , LS194A, S 194 S ig n e tic s Shift Registers 4-Bit Bidirectional Universal Shift Register Product Specification Logic Products • Buffered clock and control inputs • Shift left and shift right capability • Synchronous parallel and serial data transfers


    OCR Scan     		PDF LS194A, 74LS194A 74S194 36MHz 105MHz SO-16 1N916, 1N3064, 500ns 74194 circuit 74194 function table 74194 shift register 74194 logic diagram LS194A 74194 universal shift register 74194 pin diagram LS 74194 74S194 74194 design and application shift register

    LOGIC OF 74LS373

    Abstract: 74LS373 PIN CONFIGURATION AND SPECIFICATIONS LS 373 74LS374 pin configuration 74LS374 function latch 74ls 373
    Text: 74LS373, 74LS374, S373, S374 Signetics Logic Products I Latches/Flip-Flops FEATURES • 8-bit transparent latch — '373 • 8-blt positive, edge-triggered register — '374 • 3-State output buffers • Common 3-State Output Enable • Independent register and 3-State


    OCR Scan     		PDF 74S374 74LS373, 74LS374, 74LS373 105mA 116mA 74S373 74LS374 500ns LOGIC OF 74LS373 74LS373 PIN CONFIGURATION AND SPECIFICATIONS LS 373 74LS374 pin configuration 74LS374 function latch 74ls 373

    74LS109D

    Abstract: 4151 cp IR 9024 74LS109PC 74S109
    Text: I 1 NATIONAL SEMICOND -CLOGIO OSE D 1 5 0 1 1 5 2 □Dt,37flS 1 | T~ ¥ 6 - 0 7 - 0 7 109 C O N N E C T IO N D IA G R A M P IN O U T A 54S/74S109 54LS/74LS109 DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP D E S C R IP T IO N — T he ’109 co n sists of two high speed, com pletely indepen­


    OCR Scan     		PDF 37flS 54S/74S109 54LS/74LS109 54/74S 54/74LS 74LS109D 4151 cp IR 9024 74LS109PC 74S109

    Untitled

    Abstract: No abstract text available
    Text: 74S280 Signetics Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180 for easy system up-grading


    OCR Scan     		PDF 74S280 N74S280N 500ns 500ns

    74S280

    Abstract: 74LS N74S280N S280 4 bit even and odd parity checker
    Text: 74S280 Signetics Parity Generator/Checker 9-Bit O dd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180


    OCR Scan     		PDF 74S280 1n916, 1n3064, 500ns 74S280 74LS N74S280N S280 4 bit even and odd parity checker

    1N3064

    Abstract: 1N916 74LS 74S135 N74S135N
    Text: 74S135 Signetics Gate Quad Exclusive OR/NOR Gate Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 9ns 65 mA 74S135 FUNCTION TABLE INPUTS ORDERING CODE OUTPUT A B C Y L L H H L L H H L H L H L H L H L L L L


    OCR Scan     		PDF 74S135 N74S135N 10Sul 1N3064 1N916 74LS N74S135N

    74LS109PC

    Abstract: No abstract text available
    Text: 109 C O N N E C T IO N D IA G R A M PINOUT A /54S /74S 109 v o4LS/74LS109 DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP D E S C R IP T IO N — The '109 consists of tw o high speed, com pletely indepen­ dent transition clocked J K flip-flops. The clocking operation is independent


    OCR Scan     		PDF o4LS/74LS109 54/74S 54/74LS 74LS109PC

    parity generator using 74180

    Abstract: 74180 parity generator 74180 parity using 74180 LTNE 4 bit even and odd parity checker 74180 parity Parity Checkers pin configuration 4001 1N3064
    Text: Signetics 74180 Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Word length easily expanded by cascading • Generate even or odd parity • Checks for parity errors • See '280 for faster parity


    OCR Scan     		PDF 1N916, 1N3064, 500ns parity generator using 74180 74180 parity generator 74180 parity using 74180 LTNE 4 bit even and odd parity checker 74180 parity Parity Checkers pin configuration 4001 1N3064

    rs flip-flop IC 7400

    Abstract: 74ls105 TTL LS 7400 74LS series logic gates 7400 fan-out 74LS 3 input AND gate IC TTL 7400 schematic 74LS04 fan-out 74ls series logic family 90 watts inverter by 12v dc with 6 transisters
    Text: GENERAL DESCRIPTION ABSOLUTE MAXIMUM RATINGS Ovar operating free-air temper­ ature range unless otherwise noted Supply Voltage Vq c (See Note 1) Input Voltage V|n (See Note 1) Interemitter Voltage (See Note 2) Resistor Node Voltage, 54121, 74121 (See Note 1)


    OCR Scan     		PDF

    74S133

    Abstract: 1N3064 1N916 74LS
    Text: Signetics 74S 133 Gate 13-Input NAND Gate Product Specification Logic Products LC U R R E N T T Y P IC A y l T Y P IC A L P R O P A G A T IO N D E LA Y TY PE 4ns 74S 133 ORDERING CODE FUNCTION TABLE IN PU TS O U TP U T A —M 7 PACKAGES V ca=g P lastic DIP


    OCR Scan     		PDF 74S133 13-lnput 74S133 50/uA 1N3064 1N916 74LS

    4 bit even and odd parity checker

    Abstract: No abstract text available
    Text: SAMSUNG SEM ICO ND UC TO R I NC 05 kI?4aÍcÍ 280 De | OOO blSSJ. | 9-Bit Parity Generators/Checkers FEATURES DESCRIPTION • Genérales Odd or Even Parity for Nine Data Lines • Cascadable for N-Bits Parity • Can be used to Upgrade Existing Systems using MSI


    OCR Scan     		PDF 54/74LS KS74HCTLS: 7Tb414S 90-XO 14-Pin 4 bit even and odd parity checker

    Untitled

    Abstract: No abstract text available
    Text: 74S280 Signetics Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180 for easy system up-grading


    OCR Scan     		PDF 74S280 1N916, 1N3064, 500ns 500ns

    2 Generators manual change over switch circuit diagram

    Abstract: 24v to 5v level shifter AM25S10 1N3064 1N916 74LS 74S350 N74S350N voltage level shifter 3V to 5V
    Text: 74S350 Signetics Shifter 4-Bit Shifter With 3-State Outputs Product Specification Logic Products FEATURES • Shifts 4 bits of data to 0, 1, 2, 3 places under control of two select lines • 3-State outputs for bus organized systems • Alternate source AM25S10


    OCR Scan     		PDF AM25S10 74S350 16-Bit 13-Bit 2 Generators manual change over switch circuit diagram 24v to 5v level shifter AM25S10 1N3064 1N916 74LS 74S350 N74S350N voltage level shifter 3V to 5V

    Untitled

    Abstract: No abstract text available
    Text: Signetìcs 74180 Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Word length easily expanded by cascading • Generate even or odd parity • Checks for parity errors • See '280 for faster parity


    OCR Scan     		PDF N74180N 1N916, 1N3064, 500ns

    SN54S113

    Abstract: SN74LS113A SN54LS113A SN74 SN74S113A
    Text: SN54LS113A, SN54S113, SN74LS113A, SN74S113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D2661, APRIL 1982 - REVISED MARCH 1988 Fully Buffered to Offer Maximum Isolation from External Disturbance SN 54LS113A . S N 54S 113 . . . J OR W PACKAGE SN 74LS 113A . S N 74S 113A . . . O OR N PACKAGE


    OCR Scan     		PDF SN54LS113A, SN54S113, SN74LS113A, SN74S113A D2661, SN54S113 SN74LS113A SN54LS113A SN74

    Untitled

    Abstract: No abstract text available
    Text: LOGIC DIVISION JANUARY 1982 LATCH 8TS809 Octal Transparent Latch With Inverting 3-$tate Outputs • 8-bit transparent latch • 3-State inverting output buffers • Common 3-State Output Enable • Independent register and 3-State buffer operation DESCRIPTION


    OCR Scan     		PDF 8TS809 8TS809

    Untitled

    Abstract: No abstract text available
    Text: SAMSUNG SEMICO ND UCTOR INC 05 KS54HCTLS 0 0 / 1 KS74HCTLS * o u D e | 7*11.4145 000fc.4fl3 D 9-Bit Parity Generators/Checkers FEATURES DESCRIPTION • Generates Odd or Even Parity for Nine Data Lines • Cascadable for N-Bits Parity • Can be used to Upgrade Existing Systems using MSI


    OCR Scan     		PDF 000fc KS54HCTLS KS74HCTLS 54/74LS KS74HCTLS: KS54HCTLS: 7Tb414S 90-XO 14-Pin