Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    74F109SC Search Results

    SF Impression Pixel

    74F109SC Price and Stock

    Rochester Electronics LLC 74F109SC

    IC FF JK TYPE DUAL 1BIT 16SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74F109SC Tube 1,025
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $0.29
    		Buy Now

    onsemi 74F109SCX

    IC FF JK TYPE DUAL 1BIT 16SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74F109SCX Reel 2,500
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $0.2626
    		Buy Now

    Rochester Electronics LLC 74F109SCX

    IC FF JK TYPE DUAL 1BIT 16SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74F109SCX Bulk 2,049
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $0.15
    		Buy Now
    74F109SCX Bulk 2,049
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $0.15
    		Buy Now

    onsemi 74F109SC

    IC JK TYPE POS TRG DUAL 16SOIC - Bulk (Alt: 74F109SC)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas 74F109SC Bulk 4 Weeks 1,233
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 $0.27581
    		Buy Now

    Fairchild Semiconductor Corporation 74F109SCX

    Flip Flop, Dual, J/K Type, 16 Pin, Plastic, SOP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components 74F109SCX 7,456
    • 1 $0.42
    • 10 $0.42
    • 100 $0.42
    • 1000 $0.42
    • 10000 $0.154
    		Buy Now
    Rochester Electronics 74F109SCX 45,000 1
    • 1 $0.1479
    • 10 $0.1479
    • 100 $0.139
    • 1000 $0.1257
    • 10000 $0.1257
    		Buy Now
    Find more 74F109SC price and stock on Findchips.com

    74F109SC Datasheets (7)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74F109SC Fairchild Semiconductor Dual JK Positive Edge-Triggered Flip-Flop Original PDF
    74F109SC National Semiconductor Dual J Inverted K Positive Edge-Triggered Flip-Flop Original PDF
    74F109SC Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74F109SC_NL Fairchild Semiconductor Dual J-K Positive Edge-Triggered Flip-Flop Original PDF
    74F109SCX Fairchild Semiconductor Dual JK# Positive Edge-Triggered Flip-Flop Original PDF
    74F109SCX National Semiconductor Dual J Inverted K Positive Edge-Triggered Flip-Flop Original PDF
    74F109SCX_NL Fairchild Semiconductor Dual J-K Positive Edge-Triggered Flip-Flop Original PDF

    74F109SC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    ua78l05acm

    Abstract: UA78L05ACZ UA78L12ACM tl072 substitution tl082 substitution compare LM324 with LM741 Compare the LM324 and LF347 LM324 vs LM741 lm317 soic-8 CD4060BE equivalent
    Text: Technology for Innovators TM Texas Instruments - National Semiconductor Analog and Logic Products Cross-Reference REFERENCES IN COMPARATORS OUT GND POWER MANAGEMENT INTERFACE AMPLIFIERS D 2007 R Texas Instruments – National Semiconductor Analog and Logic


    Original     		PDF hTL082A TL082B TL082A UA78L05A UA78L12A TL082ACP ua78l05acm UA78L05ACZ UA78L12ACM tl072 substitution tl082 substitution compare LM324 with LM741 Compare the LM324 and LF347 LM324 vs LM741 lm317 soic-8 CD4060BE equivalent

    TTL 1-of-8 encoder

    Abstract: 74LS 2-input OR gate 74LS series logic gates 3 input nand gate 74LS series logic gates 3 input or gate 74F374SC
    Text: 1/2 TTL LOGIC 74F SERIES 74F SERIES • 74F: EXCELLENT SPEED/POWER CONSUMPTION COMBINATION Part Number Description SQP £ ea. Gates & Inverters 74F00SC Quad 2-Input NAND Gate 74F02SC Quad 2-Input NOR Gate 74F04SC Hex Inverter 74F08SC Quad 2-Input AND Gate


    Original     		PDF 74F164ASC 74F194SC 74F299SC 74F350SC 74F378SC 74F379SC 74F398SC 74F399SC 74F675ASC 74F676SC TTL 1-of-8 encoder 74LS 2-input OR gate 74LS series logic gates 3 input nand gate 74LS series logic gates 3 input or gate 74F374SC

    74F109

    Abstract: 9471 54F109DM 54F109FM 54F109LM 74F109PC 74F109SC 74F109SJ F109 J16A
    Text: 54F 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’F109 consists of two high-speed completely independent transition clocked JK flip-flops The clocking operation is independent of rise and fall times of the clock waveform The JK design allows operation as a D flip-flop refer to ’F74


    Original     		PDF 74F109 74F109PC 16-Lead 20-3A 74F109 9471 54F109DM 54F109FM 54F109LM 74F109PC 74F109SC 74F109SJ F109 J16A

    54F109DM

    Abstract: 54F109FM 54F109LM 74F109PC F109 J16A M16A M16D N16E 74F109
    Text: LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH General Description The ’F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation


    Original     		PDF 74F109PC 16-Lead 16-Lead ds009471 54F109DM 54F109FM 54F109LM 74F109PC F109 J16A M16A M16D N16E 74F109

    74F109

    Abstract: 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E
    Text: Revised November 1999 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform.


    Original     		PDF 74F109 74F109SC 16-Lead MS-012, 74F109 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E

    74F109

    Abstract: F109 74F109PC 74F109SC 74F109SJ M16A M16D MS-001 N16E 74f109 fairchild
    Text: Revised September 2000 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform.


    Original     		PDF 74F109 74F109SC 16-Lead MS-012, 74F109 F109 74F109PC 74F109SC 74F109SJ M16A M16D MS-001 N16E 74f109 fairchild

    74F109

    Abstract: 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E
    Text: Revised January 1999 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to CD sets Q to LOW level The F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform.


    Original     		PDF 74F109 74F109SC 16-Lead MS-012, 74F109 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E

    LM358 vs LM741

    Abstract: LM607CN LM324 vs LM741 LM337 TO-92 L308A L1117-3.3 LM2980 LM741 vs. LM324 m6 sot-23 pinout datasheet of IC 74LS90
    Text: National Semiconductor to Texas Instruments Cross-Reference National Semiconductor GPN 74AC74 74AC74 74ACT00 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT374 74ACT74 74ACT74 74F109 74F109 74F151A 74F151A 74F151A 74F153 74F153 74F153


    Original     		PDF 74AC74 74ACT00 74ACT374 LM358 vs LM741 LM607CN LM324 vs LM741 LM337 TO-92 L308A L1117-3.3 LM2980 LM741 vs. LM324 m6 sot-23 pinout datasheet of IC 74LS90

    74ls74apc

    Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
    Text: Standard Linear and Logic Products Cross-Reference Introduction Notice This Standard Linear and Logic Products CrossReference will assist in finding a device made by Texas Instruments that is a drop-in or similar replacement to many of our competitors’ standard linear and logic products.


    Original     		PDF

    74F109

    Abstract: No abstract text available
    Text: 54F109,74F109 Dual JK Note: Overbar Over the K Positive Edge-Triggered Flip-Flop Literature Number: SNOS149A LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH General Description


    Original     		PDF 54F109 74F109 SNOS149A 54F/74F109 54F/74F109 74F109

    74F109

    Abstract: No abstract text available
    Text: LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH General Description The ’F109 consists of two high-speed, completely independent transition clocked JK flip-flops. The clocking operation


    Original     		PDF 54F/74F109 54F/74F109 74F109PC 74F109SC 74F109SJ ds009471 74F109

    a215c

    Abstract: 74F109 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E
    Text: A p riM 9 8 8 Revised January 1999 74F109^ Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to Cp sets Q to LOW level T he F 1 09 consists of tw o high-speed, com pletely indepen­ dent transition clocked JK flip-flops. The clocking operation


    OCR Scan     		PDF 74F109^ a215c 74F109 74F109PC 74F109SC 74F109SJ F109 M16A M16D MS-001 N16E

    74F109

    Abstract: No abstract text available
    Text: *p n l1 9 , æ Revised January 1999 SEMICONDUCTOR TM 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description LOW input to C q sets Q to LOW level The F109 consists of tw o high-speed, com pletely indepen­ den t transition clocked JK flip-flops. The clocking operation


    OCR Scan     		PDF 74F109 74F109SC 74F109SJ 74F109PC

    Untitled

    Abstract: No abstract text available
    Text: tß National Semiconductor 54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The 'F109 consists of two high-speed, completely indepen­ dent transition clocked JR flip-flops. The clocking operation is independent of rise and fall times of the clock waveform.


    OCR Scan     		PDF 54F/74F109 74F109PC 54F109DM 74F109SC 74F109SJ

    74F109

    Abstract: No abstract text available
    Text: & November 1994 Semiconductor 54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The ’F109 consists of two high-speed, completely indepen­ dent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform.


    OCR Scan     		PDF 54F/74F109 74F109PC 20-3A 74F109

    L02 pin

    Abstract: 74F109
    Text: g & National Semiconductor 54F/74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The 'F109 consists of two high-speed, completely indepen­ dent transition clocked JR flip-flops. The clocking operation is independent of rise and fall times of the clock waveform.


    OCR Scan     		PDF 54F/74F109 74F109PC 54F109DM 74F109SC 74F109SJ DQ62213 L02 pin 74F109