Untitled
Abstract: No abstract text available
Text: QS74FCT163373 sa ^ High Speed CMOS 3.3V ITY QS74FCT163373 16-Bit Transparent Latches S emiconductor, I nc. FEATURES/BENEFITS DESCRIPTION • Pin and function compatible with T.l. Widebus and IDT Double-Density™ families • CMOS power levels: <1 |j.W typical standby
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QS74FCT163373
16-Bit
traS-48B
PSS-56B
74bbfl03
APOP-00014-00
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Untitled
Abstract: No abstract text available
Text: QS723620 Ô High-Speed CMOS 1 K X 3 6 Clocked FIFO with Bus Sizing QS723620 FEATURES • Fast cycle times: 20/25/30 ns • Selectable 36/18/9-bit word width for both input port and output port • Byte-order-reversal function i.e., “big-endian” o “little-endian” conversion
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QS723620
36/18/9-bit
16-mA-loL
132-Pin
MDSF-00020-00
74bbfl03
DDD50SÔ
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Untitled
Abstract: No abstract text available
Text: Q u a lit y S em ico n d u cto r , I n c . High-Speed CMOS 3.3V 16-Bit Bidirectional Transceiver with Bus Hold QS74LCX16H245 PRELIMINARY FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during 3-state operation
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16-Bit
QS74LCX16H245
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: rg High-Speed CMOS 3.3V qs 74l c x i 62H373 16-Bit Transparent Latch with Output Resistor and Bus Hold Q uality S em ic o n d u c to r , I n c . FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during
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62H373
16-Bit
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: QS5805, QS52805, QS8506, QS52806 PRELIMINARY Ô Guaranteed Low Skew CMOS Clock Driver/Buffer QS5805T/AT/BT QS5806T/AT/BT QS52805T/AT/BT QS52806T/AT/BT FEATURES/BENEFITS • • • • • 10 output, low skew clock signal buffer 25Q on-chip resistors available for low noise
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QS5805,
QS52805,
QS8506,
QS52806
QS5805T/AT/BT
QS5806T/AT/BT
QS52805T/AT/BT
QS52806T/AT/BT
QS5805T
QS5806T
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Untitled
Abstract: No abstract text available
Text: fS] QUALITY t Semiconductor, I nc. High Speed CMOS 3.3V 18-Bit Registered Transceivers QS74i_cxi66oi FEATURES/BENEFITS DESCRIPTION • • • • • • • The LCX16601 is an 18-bit registered bus trans ceiver with three-state outputs that are ideal for
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18-Bit
cxi66oi
LCX16601
bfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: Quality t Semiconductor , I nc . High-Speed CMOS 3.3V 18-Bit Registered Transceiver with ~ . Output Resistor q s 7 4 l c x i 62501 FEATURES/BENEFITS DESCRIPTION • • • • • • • The LCX162501 is an 18-bit registered bus trans ceiver with three-state outputs that are ideal for
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18-Bit
LCX162501
QS74LCX162501
bfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: QSFCT827T, 828T, 2827T, 2828T High Speed \ x ,CMOS Bus Interface 10-Bit Buffers Q 2 S 2 ÎE S Ï QS54/74FCT828T QS54/74FCT2827T QS54/74FCT2828T FEATURES/BENEFITS • Pin and function compatible to the 74F827/8 74FCT827/8 and 74FCT827T/8T • CMOS power levels: <7.5 mW static
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QSFCT827T,
2827T,
2828T
10-Bit
QS54/74FCT828T
QS54/74FCT2827T
QS54/74FCT2828T
74F827/8
74FCT827/8
74FCT827T/8T
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Untitled
Abstract: No abstract text available
Text: Q uality S em iconductor , I n c . High-Speed CMOS 3.3V 16-Bit Register 3-State with Output Resistor QS74LCX162374 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • The LCX162374 is a 16-bit buffered register with three-state outputs that is ideal for driving address
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16-Bit
QS74LCX162374
LCX162374
QS74LCX162374
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: Q u a lit y S em ico n d u cto r , I n c . High-Speed CMOS 3.3V 18-Bit Registered Transceivers with Output Resistor and Bus Hold QS74LCX162H501 PRELIMINARY FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during
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18-Bit
QS74LCX162H501
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: QS75436 High-Speed CMOS 4K x 36 Block-Allocated Shared-Port RAM with Flexi-Burst Q FEATURES • Two independent 2K x 36-bit blocks • Independent port controls • Fast port access times: 20 ns, 25 ns, 30 ns - 50-MHz, 40-MHz, 33-MHz cycle times • Total bandwidth 3.6 Gbits/sec
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QS75436
36-bit
50-MHz,
40-MHz,
33-MHz
208-pin
74bba03
MDSF-00015-01
00031ED
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Untitled
Abstract: No abstract text available
Text: Q u a lit y S em ico n d u cto r , I n c . High-Speed CMOS 3.3V 18-Bit Registered Transceivers with Bus Hold QS74LCX16H501 PRELIMINARY FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during 3-state operation
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18-Bit
QS74LCX16H501
500mA
bod12
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: QSFCT138T, 238T Q High Speed CMOS 1-of-8 Decoders QS54A74FCT138T o s m /w f c i » t FEATURES/BENEFITS • QSFCT138A faster than 74F I ol = 48 mA COM, 32 mA MIL • TTL-compatible input and output levels • Mil product compliant with MIL-STD 883, Class B
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QSFCT138T,
QS54A74FCT138T
QSFCT138A
QSFCT238T
TheQSFCT138T
andQSFCT238T
QSFCT138T
Description01
4fcibfi03
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PA 0016 diagram
Abstract: No abstract text available
Text: 3.3V SYNC DRAM PLL Clock Driver Q QS5920A PRELIMINARY Q u a l it y S em ico nducto r , I n c . FEATURES/BENEFITS DESCRIPTION • Intel PC100/Spread Spectrum compliant • 11 outputs • Balanced Drive Outputs ± 1 2 mA • Synchronous output enable sOE control for
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QS5920A
PC100/Spread
33MHz
100MHz
24-pin
PC-100
MO-153EE
PSS-56C
bfl03
PA 0016 diagram
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74ALS521
Abstract: diode "jyw" JYW diode
Text: QSFCT521T, 2521T Q High Speed CMOS , . . QS54/74FCT521T * Identity Comparator QS54/74FCT2521T FEATURES/BENEFITS • • • • • Pin and function compatible to the 74F521, 74FCT521, and 74ALS521 • CMOS power levels: <7.5 mW static • Available in DIP, SOIC, QSOP, ZIP, HQSOP
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QSFCT521T,
2521T
QS54/74FCT521T
QS54/74FCT2521T
74F521,
74FCT521,
74ALS521
MIL-STD-883
2521T
74ALS521
diode "jyw"
JYW diode
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Untitled
Abstract: No abstract text available
Text: Q u a l it y S em ico nducto r , I n c . High-Speed CMOS 3.3V 16-Bit Bus Registered Transceiver with Bus Hold QS74LCX16H646 FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Industry standard pinouts • Bus Hold feature holds last active state during
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16-Bit
QS74LCX16H646
500mA
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: High-Speed CMOS 3.3V 16-Bit Register 3-State with Output Resistor and Bus Hold Q u a l it y S em ic o n d u c to r , I n c . QS74LCX162H374 FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during
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16-Bit
QS74LCX162H374
500mA
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: Quality T S em ic o n d u c to r , I n c . High Speed CMOS 3.3V 18-Bit Registered Transceivers with Clock _ . . . _ , , , Enable and Bus Hold Q S 7 4 i_ c x i6 H 6 o i p r e l im in a r y FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during
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18-Bit
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: QS74FCT163245 T§\ qu^ ity High Speed 3.3V QS74FCT163245 16-Bit Bidirectional Transceivers S e m ic o n d u c t o r , I n c . FEATURES/BENEFITS DESCRIPTION • Pin and function compatible with T.l. Widebus and IDT Double-Density™ families • CMOS power levels: <1p.W typical standby
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QS74FCT163245
16-Bit
PSS-56B
74bbfl03
APOP-00014-00
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Untitled
Abstract: No abstract text available
Text: 3.3V SYNC DRAM PLL Clock Driver Q QS5920 Q uality S emiconductor , In c . FEATURES/BENEFITS DESCRIPTION • • • • • • • • • • • The QS5920 is a high-performance, low skew, low jitter, multiple output phase locked loop clock driver. It provides precise phase and frequency alignment of
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QS5920
QS5920
33MHz
125MHz
may-24C
74bbA03
000375b
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QS72211
Abstract: No abstract text available
Text: QS72211, QS72221 ADVANCE INFORMATION Q High-Speed CMOS 5 1 2 x 9 , 1K X 9 Parallel Clocked FIFO QS72211 QS72221 FEATURES • • • • 15-ns 66 MHz read/write cycle times Synchronous/asynchronous read and write TTL compatible input and output levels Low power with industry-standard pinouts
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QS72211,
QS72221
512x9,
QS72211
QS72221
15-ns
32-pin
512x9
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Untitled
Abstract: No abstract text available
Text: Q u a lit y S em ico n d u cto r , I n c . QS74LCX162H952 High-Speed CMOS 3.3V 16-Bit Bus Register Transceiver with Bus Hold and Output Resistor FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • 25i2 series resistor for low switching noise
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QS74LCX162H952
16-Bit
500mA
74bbfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: fg] High-Speed CMOS 3.3V qs74lcxi6h952 16-Bit Bus Register T ransceiver w ith BUS Hold S e m ic o n d u c t o r ,I n c . FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Industry standard pinout • Bus Hold feature holds last active state during
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qs74lcxi6h952
16-Bit
500mA
bfl03
DDD37S7
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Untitled
Abstract: No abstract text available
Text: QS3J245 ADVANCE INFORMATION QuickScan 8-Bit Universal JTAG Access Port with Output Enable qs3J245 FEATURES/BENEFITS • • • • • • IEEE 1149.1 - 1993 compliant Direct bus connection when switches on Superset pinout of a '245 Undershoot clamp diodes on all inputs
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QS3J245
qs3J245
24-pin
MDSL-00091-00
74bba03
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