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    74LVX373 Price and Stock

    Rochester Electronics LLC 74LVX373SJ

    IC D-TYPE TRANSP SGL 8:8 20SOP
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    DigiKey 74LVX373SJ Tube 37,007 1,158
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    Rochester Electronics LLC 74LVX373M

    74LVX373 - LOW VOLTAGE OCTAL TRA
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    DigiKey 74LVX373M Bulk 27,755 627
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    74LVX373M Bulk 7,364 627
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    Rochester Electronics LLC MC74LVX373DWR2G

    BUS DRIVER, LV/LV-A/LVX/H SERIES
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    DigiKey MC74LVX373DWR2G Bulk 24,185 592
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    Rochester Electronics LLC MC74LVX373DW

    BUS DRIVER
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    DigiKey MC74LVX373DW Bulk 11,324 2,959
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    Rochester Electronics LLC MC74LVX373M

    BUS DRIVER
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    DigiKey MC74LVX373M Tube 10,880 2,049
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    74LVX373 Datasheets (37)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVX373 Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE O Original PDF
    74LVX373 Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373 National Semiconductor Low Voltage Octal Transparent Latch with TRI-STATE Outputs Original PDF
    74LVX373 STMicroelectronics LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS Original PDF
    74LVX373 STMicroelectronics LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS Original PDF
    74LVX373 STMicroelectronics LOW VOLTAGE OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS Original PDF
    74LVX373M Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373M Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373M National Semiconductor Low Voltage Octal Transparent Latch with TRI-STATE Outputs Original PDF
    74LVX373M STMicroelectronics Latch, D-Type, Transparent, 8-Channel, 3-State, 20-SOP Original PDF
    74LVX373M STMicroelectronics LOW VOLTAGE OCTAL D-TYPE LATCH (3-STATE NON INV.) Original PDF
    74LVX373M STMicroelectronics LOW VOLTAGE OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS Original PDF
    74LVX373M National Semiconductor Low Voltage Octal Transparent Latch with TRI-STATE Outputs Scan PDF
    74LVX373MSCX Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373MTC Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373MTC Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373MTC National Semiconductor Low Voltage Octal Transparent Latch with TRI-STATE Outputs Original PDF
    74LVX373MTC National Semiconductor Low Voltage Octal Transparent Latch with TRI-STATE Outputs Scan PDF
    74LVX373MTCX Fairchild Semiconductor Low Voltage Octal Transparent Latch with 3-STATE Outputs Original PDF
    74LVX373MTCX National Semiconductor Low Voltage Octal Transparent Latch with TRI-STATE Outputs Scan PDF

    74LVX373 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVX373

    Abstract: 74LVX373M 74LVX373MTC 74LVX373SJ M20D MTC20
    Text: 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description Features The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


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    PDF 74LVX373 LVX373 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MTC20

    74LVX373

    Abstract: No abstract text available
    Text: 74LVX373 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD=5.8ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


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    PDF 74LVX373 74LVX373

    74LVX373

    Abstract: 74LVX373M 74LVX373T
    Text: 74LVX373  LOW VOLTAGE OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.8 ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V


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    PDF 74LVX373 LVX373 P013L TSSOP20 74LVX373 74LVX373M 74LVX373T

    Untitled

    Abstract: No abstract text available
    Text: 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description Features The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


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    PDF 74LVX373 LVX373

    74LVX373

    Abstract: semikron semipont 2 skch 40/12 74LVX373M 74LVX373T
    Text: 74LVX373  LOW VOLTAGE OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.8 ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V


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    PDF 74LVX373 LVX373 74LVX373 semikron semipont 2 skch 40/12 74LVX373M 74LVX373T

    74LVX373

    Abstract: 74LVX373M 74LVX373MTC 74LVX373MTCX 74LVX373MX 74LVX373SJ 74LVX373SJX M20D LVX373
    Text: 74LVX373 Low Voltage Octal Transparent Latch with TRI-STATE Outputs General Description Features The LVX373 consists of eight latches with TRI-STATE outputs for bus organized system applications The latches appear transparent to the data when Latch Enable LE is


    Original
    PDF 74LVX373 LVX373 74LVX373 74LVX373M 74LVX373MTC 74LVX373MTCX 74LVX373MX 74LVX373SJ 74LVX373SJX M20D

    74LVX373

    Abstract: 74LVX373M 74LVX373MTR 74LVX373TTR
    Text: 74LVX373 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD=5.8ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


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    PDF 74LVX373 74LVX373 74LVX373M 74LVX373MTR 74LVX373TTR

    74LVX373

    Abstract: 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013 MTC20 JEDEC J-STD-020B
    Text: Revised April 2005 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description Features The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


    Original
    PDF 74LVX373 LVX373 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013 MTC20 JEDEC J-STD-020B

    MTC20

    Abstract: 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013
    Text: Revised March 1999 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


    Original
    PDF 74LVX373 LVX373 74LVX373M 74LVX373SJ 74LVX373MTC MTC20 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013

    74LVX373

    Abstract: 74LVX373M 74LVX373MTR 74LVX373TTR
    Text: 74LVX373 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD=5.8ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


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    PDF 74LVX373 74LVX373 74LVX373M 74LVX373MTR 74LVX373TTR

    74LVX373

    Abstract: 74LVX373MTR 74LVX373TTR
    Text: 74LVX373 LOW VOLTAGE CMOS OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD=5.8ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V


    Original
    PDF 74LVX373 74LVX373 74LVX373MTR 74LVX373TTR

    LVX373

    Abstract: 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013 MTC20
    Text: Revised September 2003 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description Features The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


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    PDF 74LVX373 LVX373 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013 MTC20

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


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    PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    74LVT JK Flip Flop

    Abstract: led driver SOT23 6pin lcx244 MOTOROLA lcx 4245 LCX244 quad single supply 50 Ohm Line Drivers diode sj Fairchild Power Switch package to 220 p5 MAX 16841 On semiconductor LCX 574 PA
    Text: 1 Chapter 1 Introduction to Low-Voltage Logic Chapter C R O S S V O L T Parts & Availability 17 Packaging Options 37 Low-Voltage Logic Cross Reference 49 Glossary 57 Fairchild Low-Voltage Logic Reference Guide Chapter Chapter Glossary  Introduction to Low-Voltage Logic


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    PDF

    Untitled

    Abstract: No abstract text available
    Text: S E M I C O N D U C T O R -n 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description Features The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


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    PDF 74LVX373 LVX373

    74LVX373

    Abstract: 74LVX373M 74LVX373MTC 74LVX373SJ M20D MTC20
    Text: 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description Features The LVX373 consists of eight latches w ith 3-STATE outputs for bus organized system applications. The latches appear transparent to the d ata w hen Latch Enable LE is HIGH.


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    PDF 74LVX373 LVX373 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MTC20

    Untitled

    Abstract: No abstract text available
    Text: 74LVX373 LOW VOLTAGE OCTAL D-TYPE LATCH 3-STATE NON INV. WITH 5V TOLERANT INPUTS . . . . . . . . HIGH SPEED: tpD = 5.8 ns (TYP.) at Vcc = 3.3V 5VTOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V LOW POWER DISSIPATION:


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    PDF 74LVX373 LVX373

    74LVX373

    Abstract: 74LVX373M 74LVX373MTC 74LVX373MTCX 74LVX373MX 74LVX373SJ 74LVX373SJX
    Text: LVX373 National Semiconductor 74LVX373 Low Voltage Octal Transparent Latch with TRI-STATE Outputs General Description Features The LVX373 consists of eight latches with TRI-STATE out­ puts for bus organized system applications. The latches ap­ pear transparent to the data when Latch Enable LE is


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    PDF 74LVX373 LVX373 74lvx373 bS0115E 74LVX373M 74LVX373MTC 74LVX373MTCX 74LVX373MX 74LVX373SJ 74LVX373SJX

    Untitled

    Abstract: No abstract text available
    Text: S E M [CONDUCTOR TM 74LVX373 Low Voltage Octal Transparent Latch with 3-STATE Outputs General Description The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH.


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    PDF 74LVX373 LVX373 74LVX373M

    LVX373

    Abstract: No abstract text available
    Text: LVX373 EH ÆÆ National Semiconductor 74LVX373 Low Voltage Octal Transparent Latch with TRI-STATE Outputs General Description Features The LVX373 consists of eight latches with TRI-STATE out­ puts for bus organized system applications. The latches ap­


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    PDF LVX373 74LVX373 LVX373

    74LVX373

    Abstract: 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013 MTC20
    Text: Revised March 1999 SEMICQNDUCTGRTM General Description The LVX373 consists of eight latches with 3-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch Enable LE is HIGH. When LE is LOW, the data satisfying the input timing


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    PDF 74LVX373 LVX373 74LVX373 74LVX373M 74LVX373MTC 74LVX373SJ M20D MS-013 MTC20

    Untitled

    Abstract: No abstract text available
    Text: ALPHANUMERICAL INDEX LCX FAMILY Type Number Function Package Page Number 51 74LCX00 Quad 2-Input NAND Gate with 5V Tolerant Input TSS0P/S014 74LCX02 Quad 2-Input NOR Gate with 5V Tolerant Input TSS0P/S014 57 74LCX04 Hex Inverter with 5V Tolerant Input TSS0P/S014


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    PDF 74LCX00 74LCX02 74LCX04 74LCX08 74LCX14 74LCX32 74LCX74 74LCX86 74LCX125 74LCX240

    Untitled

    Abstract: No abstract text available
    Text: Section 8 LV X Family * Section 8 Contents LVX Family Features. 74LVX00 Low Voltage Quad 2-Input NAND G a t e .


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    PDF 74LVX00 74LVX02 74LVX04 74LVX08 74LVX14 74LVX244 74LVX245 74LVX273 74LVX373 74LVX374

    Untitled

    Abstract: No abstract text available
    Text: SEMICONDUCTOR June 1993 Revised March 1999 TM output is in the high im pedance state. The inputs tolerate up to 7V allowing interface of 5V system s to 3V system s. General Description The LVX373 consists of eight latches with 3-STATE outputs fo r bus organized system applications. The latches a ppear


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    PDF 74LVX373 74LVX373 LVX373