74LVT16500ADL-T Search Results
74LVT16500ADL-T Datasheets (2)
| Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
|---|---|---|---|---|---|---|
| 74LVT16500ADL-T |
|
3.3 V 18-bit universal bus transceiver; 3-state - Description: 3.3V 18-Bit Universal Bus Transceiver; Negative Edge Trigger Clock with Bus Hold (3-State) ; Fmax: 350 MHz; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: -32/+64 mA ; Propagation delay: 1.9@3.3V ns; Voltage: 2.7-3.6 V | Original | |||
| 74LVT16500ADL-T | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical |