74LVT16500ADL Search Results
74LVT16500ADL Price and Stock
NXP Semiconductors 74LVT16500ADL,512IC UNIV BUS TXRX 18BIT 56SSOP |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74LVT16500ADL,512 | Tube | 1,326 |
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Buy Now | ||||||
Philips Semiconductors 74LVT16500ADLBus Transceiver, Single, 18 Bit, 56 Pin, Plastic, SSOP |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74LVT16500ADL | 800 |
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Buy Now |
74LVT16500ADL Datasheets (10)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | |
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74LVT16500ADL |
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3.3 V 18 Bit Universal Bus Transceiver (3-State) | Original | |||
74LVT16500ADL | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | |||
74LVT16500ADL |
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3.3V ABT 18-bit universal bus transceiver (3-State) | Scan | |||
74LVT16500ADL |
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3.3V LVT 18-bit universal bus transceiver (3-State) | Scan | |||
74LVT16500ADL,112 |
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74LVT16500ADL - 3.3 V 18-bit universal bus transceiver; 3-state, SOT371-1 Package, Standard Marking, IC'S Tube - DSC Bulk Pack | Original | |||
74LVT16500ADL,118 |
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74LVT16500ADL - 3.3 V 18-bit universal bus transceiver; 3-state, SOT371-1 Package, Standard Marking, Reel Pack, SMD, 13" | Original | |||
74LVT16500ADL,512 |
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3.3 V 18-bit universal bus transceiver; 3-state - Description: 3.3V 18-Bit Universal Bus Transceiver; Negative Edge Trigger Clock with Bus Hold (3-State) ; Fmax: 350 MHz; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: -32/+64 mA ; Propagation delay: 1.9@3.3V ns; Voltage: 2.7-3.6 V; Package: SOT371-1 (SSOP56); Container: Tube Dry Pack | Original | |||
74LVT16500ADL,518 |
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3.3 V 18-bit universal bus transceiver; 3-state - Description: 3.3V 18-Bit Universal Bus Transceiver; Negative Edge Trigger Clock with Bus Hold (3-State) ; Fmax: 350 MHz; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: -32/+64 mA ; Propagation delay: 1.9@3.3V ns; Voltage: 2.7-3.6 V; Package: SOT371-1 (SSOP56); Container: Reel Dry Pack, SMD, 13" | Original | |||
74LVT16500ADL-T |
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3.3 V 18-bit universal bus transceiver; 3-state - Description: 3.3V 18-Bit Universal Bus Transceiver; Negative Edge Trigger Clock with Bus Hold (3-State) ; Fmax: 350 MHz; Logic switching levels: TTL ; Number of pins: 56 ; Output drive capability: -32/+64 mA ; Propagation delay: 1.9@3.3V ns; Voltage: 2.7-3.6 V | Original | |||
74LVT16500ADL-T | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical |
74LVT16500ADL Datasheets Context Search
Catalog Datasheet | MFG & Type | Document Tags | |
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JESD22-C101-C
Abstract: SSOP56 74LVT16500A 74LVT16500ADGG 74LVT16500ADL JESD78 TSSOP56
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Original |
74LVT16500A 18-bit 74LVT16500A JESD22-C101-C SSOP56 74LVT16500ADGG 74LVT16500ADL JESD78 TSSOP56 | |
EL B17
Abstract: 74LVT16500A 74LVT16500ADGG 74LVT16500ADL LVT16500A fnd display
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OCR Scan |
ABT18-bit 74LVT16500A 18-bit 64mA/-32mA 500mA 74LVT16 510MHz 500ns EL B17 74LVT16500A 74LVT16500ADGG 74LVT16500ADL LVT16500A fnd display |