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    74LVC00 Search Results

    74LVC00 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LVC00A-000 Renesas Electronics Corporation QUAD 2INPUT POS NAND GATE Visit Renesas Electronics Corporation
    SN74LVC00APWRG4 Texas Instruments Quadruple 2-Input Positive-NAND Gate 14-TSSOP -40 to 125 Visit Texas Instruments Buy
    SN74LVC00AD Texas Instruments Quadruple 2-Input Positive-NAND Gate 14-SOIC -40 to 125 Visit Texas Instruments Buy
    SN74LVC00ADT Texas Instruments Quadruple 2-Input Positive-NAND Gate 14-SOIC -40 to 125 Visit Texas Instruments Buy
    SN74LVC00APWRE4 Texas Instruments Quadruple 2-Input Positive-NAND Gate 14-TSSOP -40 to 125 Visit Texas Instruments Buy
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    74LVC00 Price and Stock

    Rochester Electronics LLC SN74LVC00ANSR

    IC GATE NAND 4CH 2-INP 14SO
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    Rochester Electronics LLC 74LVC00ADB,118

    IC GATE NAND 4CH 2-INP 14SSOP
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    Rochester Electronics LLC SN74LVC00ADRG4

    IC GATE NAND 4CH 2-INP 14SOIC
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    Nexperia 74LVC00APW,118

    IC GATE NAND 4CH 2-INP 14TSSOP
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    Texas Instruments SN74LVC00ANSR

    IC GATE NAND 4CH 2-INP 14SO
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    74LVC00 Datasheets (83)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVC00A Diodes QUADRUPLE 2-INPUT NAND GATES Original PDF
    74LVC00A Philips Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00A STMicroelectronics LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE Original PDF
    74LVC00A STMicroelectronics Quad 2-Input NAND Gate Advenced Performance Original PDF
    74LVC00ABQ NXP Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00ABQ Philips Semiconductors 74LVC00A, Quad 2-input NAND gate Original PDF
    74LVC00ABQ Philips Semiconductors Quad 2-Input NAND Gate Original PDF
    74LVC00ABQ,115 NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT762-1 (DHVQFN14); Container: Reel Pack, SMD, 7" Original PDF
    74LVC00ABQ,115 NXP Semiconductors 74LVC00 - IC LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PQCC14, 2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-762-1, DHVQFN-14, Gate Original PDF
    74LVC00ABQ-G NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6 Original PDF
    74LVC00ABQ-G NXP Semiconductors 74LVC00ABQ - Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6 Original PDF
    74LVC00ABQ-Q100 NXP Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00ABQ-Q100115 NXP Semiconductors NAND GATE Original PDF
    74LVC00ABQ-Q100X NXP Semiconductors 74LVC00ABQ-Q100 - 74LVC00ABQ-Q100 - Quad 2-input NAND gate Original PDF
    74LVC00AD NXP Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00AD Philips Semiconductors Quad 2-input NAND gate Original PDF
    74LVC00AD Philips Semiconductors Quad 2-Input NAND Gate Original PDF
    74LVC00AD,112 NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT108-1 (SO14); Container: Tube Original PDF
    74LVC00AD,112 NXP Semiconductors 74LVC00 - IC LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14, 3.90 MM, PLASTIC, MS-012, SOT-108-1, SO-14, Gate Original PDF
    74LVC00AD,118 NXP Semiconductors Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT108-1 (SO14); Container: Reel Pack, SMD, 13" Original PDF

    74LVC00 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    uA311

    Abstract: 74LVC00AMTR 74LVC00A 74LVC00ATTR TSSOP14
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V


    Original     		PDF 74LVC00A 500mA 74LVC00A uA311 74LVC00AMTR 74LVC00ATTR TSSOP14

    74LVC00A

    Abstract: 74LVC00AD 74LVC00ADB 74LVC00APW
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 1998 Apr 28 2002 Mar 05 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic


    Original     		PDF 74LVC00A 74LVC00A SCA74 613508/03/pp16 74LVC00AD 74LVC00ADB 74LVC00APW

    74LVC00AMTR

    Abstract: 74LVC00A 74LVC00AM 74LVC00ATTR TSSOP14
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V


    Original     		PDF 74LVC00A 500mA 74LVC00A 74LVC00AMTR 74LVC00AM 74LVC00ATTR TSSOP14

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A Quad 2-input NAND gate Rev. 7 — 25 April 2012 Product data sheet 1. General description The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these


    Original     		PDF 74LVC00A 74LVC00A JESD8-C/JESD36 JESD22-A114F

    JESD22-C101E

    Abstract: No abstract text available
    Text: 74LVC00A Quad 2-input NAND gate Rev. 6 — 6 January 2012 Product data sheet 1. General description The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these


    Original     		PDF 74LVC00A 74LVC00A JESD8-C/JESD36 JESD22-C101E

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A QUADRUPLE 2-INPUT NAND GATES Pin Assignments Description The 74LVC00A provides four independent 2-input NAND gates. The Top View device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be


    Original     		PDF 74LVC00A 74LVC00A DS35257

    74LVC00A

    Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW DHVQFN14 SSOP14 TSSOP14 dhvqfn14 footprint
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2002 Mar 05 2003 May 07 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic


    Original     		PDF 74LVC00A 74LVC00A SCA75 613508/04/pp20 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW DHVQFN14 SSOP14 TSSOP14 dhvqfn14 footprint

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE ADVANCED PERFORMANCE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		PDF 74LVC00A 500mA 74LVC00A

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A Quad 2-input NAND gate Rev. 7 — 25 April 2012 Product data sheet 1. General description The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these


    Original     		PDF 74LVC00A 74LVC00A JESD8-C/JESD36

    74LVC00AMTR

    Abstract: No abstract text available
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE ADVANCED PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V


    Original     		PDF 74LVC00A 500mA 74LVC00AM 74LVC00AMTR 74LVC00ATTR 74LVC00A

    74LVC00A

    Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW SSOP14 TSSOP14
    Text: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2003 May 07 2003 Sep 04 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic


    Original     		PDF 74LVC00A 74LVC00A SCA75 R20/05/pp15 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW SSOP14 TSSOP14

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V


    Original     		PDF 74LVC00A 500mA 74LVC00A

    74LVC00AMTR

    Abstract: No abstract text available
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V


    Original     		PDF 74LVC00A 500mA 74LVC00AMTR 74LVC00ATTR 74LVC00AMTR

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A-Q100 Quad 2-input NAND gate Rev. 1 — 27 February 2013 Product data sheet 1. General description The 74LVC00A-Q100 provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.


    Original     		PDF 74LVC00A-Q100 74LVC00A-Q100 AEC-Q100

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A QUADRUPLE 2-INPUT NAND GATES Description Pin Assignments NEW PRODUCT The 74LVC00A provides four independent 2-input NAND Top View gates. The device is designed for operation with a power 1A 1 14 Vcc supply range of 1.65V to 5.5V. The inputs are tolerant to


    Original     		PDF 74LVC00A 74LVC00A S0-14 SO-14 DS35257

    Untitled

    Abstract: No abstract text available
    Text: 74LVC00A QUADRUPLE 2-INPUT NAND GATES Description Pin Assignments The 74LVC00A provides four independent 2-input NAND gates. The Top View device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be


    Original     		PDF 74LVC00A 74LVC00A DS35257

    74LVC00A

    Abstract: 74LVC00AM 74LVC00AMTR 74LVC00ATTR TSSOP14
    Text: 74LVC00A LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE HIGH PERFORMANCE • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.3ns MAX. at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V


    Original     		PDF 74LVC00A 500mA 74LVC00A 74LVC00AM 74LVC00AMTR 74LVC00ATTR TSSOP14

    74LVC00

    Abstract: 74LVC00D 74LVC00DB 74LVC00PW
    Text: I Product Specification Philips Semiconductors Quad 2-input NAND gate QUICK REFERENCE DATA GND = 0 V ; Tmb = 25°C; t, = t, < 2.5 ns FEATURES • • • • • 74LVC00 Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A.


    OCR Scan     		PDF 74LVC00 74LVC00 7110fl2b 010D471 74LVC00D 74LVC00DB 74LVC00PW

    ph2apzh

    Abstract: 74LVC00 74LVC00D 74LVC00DB 74LVC00PW
    Text: Philips Semiconductors Product Specification Quad 2-input NAND gate FEATURES • • • • • 74LVC00 QUICK REFERENCE DATA GND = 0 V; T ^ , = 25°C; t, = t, < 2.5 ns W ide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1 A.


    OCR Scan     		PDF 74LVC00 74LVC00 7110fl2b ph2apzh 74LVC00D 74LVC00DB 74LVC00PW

    74LVC04

    Abstract: 74LVC157 74LVC162244A 74LVC00 octal buffer
    Text: Philips Semiconductors Advanced Low Voltage CMOS REPLACEMENT LIST Replacement List LVC TO LVCXXXA LVC PA RT TY P E Function 74LVC00 2-Input NAND Gate speed 74LVC00A 74LVC02 2-Input N O R Gate speed 74LVC02A Improvement Replacement 74LVC04 Hex Inverter Gate


    OCR Scan     		PDF 74LVC00 74LVC02 74LVC04 74LVCU04 74LVC08 74LVC10 74LVC32 74LVC74 74LVC86 74LVC125 74LVC157 74LVC162244A octal buffer

    74LVC00A

    Abstract: 74LVC00APW MS-012AB SSOP14 TSSOP14
    Text: Philips Sem iconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • W ide supply range of 1.2V to 3.6V The 74LVC00A is a high-perform ance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible T TL families.


    OCR Scan     		PDF 74LVC00A 74LVC00A SQT402-1 MO-153 74LVC00APW MS-012AB SSOP14 TSSOP14

    74LVC00A

    Abstract: 74LVC00APW MS-012AB SSOP14
    Text: Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    OCR Scan     		PDF 74LVC00A TSSOP14: SQT402-1 MO-153 74LVC00APW MS-012AB SSOP14

    74LVCOOA

    Abstract: No abstract text available
    Text: Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • Wide supply range of 1.2V to 3.6V The 74LVC00A is a high-performance, low power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    OCR Scan     		PDF 74LVC00A 74LVC00A 74LVCOOA

    74LVCOO

    Abstract: No abstract text available
    Text: Philips Semiconductors Product Specification Quad 2-input NAND gate FEATURES • • • • • 74LVC00 Q U IC K R EFERENCE DATA G ND = 0 V; Tamb = 25°C; tr = t, < 2.5 ns W ide su pp ly voltag e range of 1.2 V to 3.6 V In accordance w ith JEDEC standard no. 8-1 A.


    OCR Scan     		PDF 74LVC00 74LVC00 74LVCOO