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    74AUP2G32DC Search Results

    74AUP2G32DC Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    SN74AUP2G32DCUR Texas Instruments Low-Power Dual 2-Input Positive-OR Gate 8-VSSOP -40 to 85 Visit Texas Instruments Buy
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    74AUP2G32DC Price and Stock

    Texas Instruments SN74AUP2G32DCUR

    IC GATE OR 2CH 2-INP 8VSSOP
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    DigiKey SN74AUP2G32DCUR Reel 24,000 3,000
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    SN74AUP2G32DCUR Cut Tape 942 1
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    SN74AUP2G32DCUR Digi-Reel 1
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    Mouser Electronics SN74AUP2G32DCUR 5,925
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    Bristol Electronics SN74AUP2G32DCUR 1,160 12
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    Ameya Holding Limited SN74AUP2G32DCUR 87,487
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    Nexperia 74AUP2G32DC,125

    IC GATE OR 2CH 2-INP 8VSSOP
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    DigiKey 74AUP2G32DC,125 Reel 6,000 3,000
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    74AUP2G32DC,125 Cut Tape 5,138 1
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    74AUP2G32DC,125 Digi-Reel 1
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    Avnet Americas 74AUP2G32DC,125 Reel 4 Weeks 1
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    74AUP2G32DC,125 Reel 6,000
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    Mouser Electronics 74AUP2G32DC,125 3,112
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    Newark 74AUP2G32DC,125 Cut Tape 1
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    Rochester Electronics 74AUP2G32DC,125 630 1
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    74AUP2G32DC Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74AUP2G32DC NXP Semiconductors Low-power dual 2-input OR gate Original PDF
    74AUP2G32DC,125 NXP Semiconductors Low-power dual 2-input OR gate; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP2G32DC,125 NXP Semiconductors 74AUP2G32 - IC AUP/ULP/V SERIES, DUAL 2-INPUT OR GATE, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, Gate Original PDF
    74AUP2G32DC-G NXP Semiconductors Low-power dual 2-input OR gate Original PDF
    74AUP2G32DC-G NXP Semiconductors 74AUP2G32DC - Low-power dual 2-input OR gate Original PDF

    74AUP2G32DC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP2G32 74AUP2G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP2G32 74AUP2G32

    74AUP2G32

    Abstract: 74AUP2G32DC
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 4 — 21 October 2010 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP2G32 74AUP2G32 74AUP2G32DC

    74AUP2G32

    Abstract: 74AUP2G32DC 74AUP2G32GM MO-187
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 02 — 28 February 2008 Product data sheet 1. General description The 74AUP2G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G32 74AUP2G32 74AUP2G32DC 74AUP2G32GM MO-187

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 5 — 6 December 2011 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP2G32 74AUP2G32

    74AUP2G32

    Abstract: 74AUP2G32DC 74AUP2G32GM JESD22-A114E
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 03 — 8 January 2009 Product data sheet 1. General description The 74AUP2G32 provides the dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G32 74AUP2G32 74AUP2G32DC 74AUP2G32GM JESD22-A114E

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 7 — 23 January 2013 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original     		PDF 74AUP2G32 74AUP2G32

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G32 Low-power dual 2-input OR gate Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original     		PDF 74AUP2G32 74AUP2G32

    NC7WP32L8X

    Abstract: SLG74LB2G32 74LVC2G32 74AUP2G32 NC7WP32 NC7WZ32 NL27WZ32 SN74AUC2G32 SN74AUP2G32 SN74LVC2G32
    Text: SLG74LB2G32 GreenLIBTM DUAL 2-INPUT OR GATE General Description The GreenLIB provides the dual 2-input OR function. This device ensures a very low static and dynamic power consumption. Output Summary • Features • Pb-Free / RoHS Compliant • Halogen-Free


    Original     		PDF SLG74LB2G32 NC7WP32 NC7WZ32 74AUP2G32 74LVC2G32 NL27WZ32 SN74AUC2G32, SN74Ad 000-0074LB2G32-11 NC7WP32L8X SLG74LB2G32 SN74AUC2G32 SN74AUP2G32 SN74LVC2G32