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    74ACT11112 Search Results

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    74ACT11112 Price and Stock

    Rochester Electronics LLC 74ACT11112N

    IC FF JK TYPE DUAL 1BIT 16DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74ACT11112N Bulk 3,586 392
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    • 1000 $0.77
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    Rochester Electronics LLC 74ACT11112DR

    IC FF JK TYPE DUAL 1BIT 16SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74ACT11112DR Bulk 2,500 650
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    Rochester Electronics LLC 74ACT11112D

    IC FF JK TYPE DUAL 1BIT 16SOIC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74ACT11112D Bulk 1,460 392
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    Texas Instruments 74ACT11112DR

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics 74ACT11112DR 2,410
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    Rochester Electronics 74ACT11112DR 2,500 1
    • 1 $0.4664
    • 10 $0.4664
    • 100 $0.4384
    • 1000 $0.3964
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    Texas Instruments 74ACT11112D

    J-K Flip-Flop, ACT Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, PDSO16 '
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics 74ACT11112D 1,460 1
    • 1 $0.7735
    • 10 $0.7735
    • 100 $0.7271
    • 1000 $0.6575
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    74ACT11112 Datasheets (12)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74ACT11112 Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET Original PDF
    74ACT11112 Texas Instruments Dual J-k Negative-edge-triggered Flip-flop With Clear and Preset Original PDF
    74ACT11112D Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 Original PDF
    74ACT11112D Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET Original PDF
    74ACT11112D Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74ACT11112D Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Scan PDF
    74ACT11112DR Texas Instruments Dual J-k Negative-edge-triggered Flip-flops With Clear and Preset Original PDF
    74ACT11112DR Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 Original PDF
    74ACT11112N Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET Original PDF
    74ACT11112N Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP -40 to 85 Original PDF
    74ACT11112N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74ACT11112N Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Scan PDF

    74ACT11112 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil

    74ACT11112

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil 74ACT11112

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil

    74ACT11112DR

    Abstract: 74ACT11112N 74ACT11112 74ACT11112D
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil 74ACT11112DR 74ACT11112N 74ACT11112 74ACT11112D

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET SCAS064A D3339, JUNE 1989 – REVISED APRIL 1993 • • • • • • • D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    Original
    PDF 74ACT11112 SCAS064A D3339, 500-mA 300-mil

    SN49LS704

    Abstract: NC-TEX14A-0380 NC-TEX14A SN74HCT38245 sn49ls 74AC11020 SN74BCT38245 sn74s301n TEX39A0380 74AC11132
    Text: TEXAS INSTRUMENTS 1997 Standard Linear and Logic Logic Product Withdrawal Device List June 13 1997 Texas Instruments Semiconductor Group, Standard Linear and Logic, continually monitors worldwide sales and billings activities on all the products offered to


    Original
    PDF SN74ALS38157A SN74ALS38240A SN74ALS38244B SN74ALS38244C SN74ALS38374A SN74ALS38541 SN74ALS677A SN74ALS8003A SN74ALS842 SN74AS131A SN49LS704 NC-TEX14A-0380 NC-TEX14A SN74HCT38245 sn49ls 74AC11020 SN74BCT38245 sn74s301n TEX39A0380 74AC11132

    c5088 transistor

    Abstract: transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N
    Text: Transistor - Diode Cross Reference - H.P. Part Numbers to JEDEC Numbers Part Num. 1820-0225 1820-0240 1820-0352 1820-1804 1821-0001 1821-0002 1821-0006 1850-0062 1850-0064 1850-0075 1850-0076 1850-0093 1850-0099 1850-0126 1850-0137 1850-0150 1850-0151 1850-0154


    Original
    PDF 1853IMPATT c5088 transistor transistor C3207 TLO84CN sec c5088 IN5355B D2817A C3207 transistor toshiba f630 TLO81CP MC74HC533N

    Untitled

    Abstract: No abstract text available
    Text: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET _ SCAS064A - D3339. JUNE 1989 - REVISED APRIL 1993 D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation


    OCR Scan
    PDF 74ACT11112 SCAS064A D3339. 500-mA 300-mii

    T10103

    Abstract: 74ACT11112
    Text: 54ACT11112, 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET TI0103D3339, JUNE 1989— REVISED JANUARY 1990 • Inputs are TTL-Voltage Compatible 54 A C T 1 1 1 1 2 . . . J P ACKA G E 7 4 A C T 1 1112 . . . D O R N P ACKA G E


    OCR Scan
    PDF 54ACT11112, 74ACT11112 TI0103â D3339, 500-mA 300-mil T10103

    TI0103

    Abstract: No abstract text available
    Text: 54ACT11112, 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET T I0103— D 3339, JUNE 1989— REVISED JAN U AR Y 1990 • Inputs are TTL-Voltage Compatible 54ACT11112 . . . J PACKAGE 74ACT11112 . . . D OR N PACKAGE Flow-Through Architecture to Optimize PCB


    OCR Scan
    PDF 54ACT11112, 74ACT11112 I0103-- 500-mA 300-mil TI0103

    TI0103

    Abstract: No abstract text available
    Text: 54ACT11112, 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET T I0 1 0 3 — D 3 3 3 9 • Inputs are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout C 1 U 1Q C 2 1 PRE IQ • EPIC'“ Enhanced-Performance Implanted


    OCR Scan
    PDF 54ACT11112, 74ACT11112 500-mA 300-mil 54ACT11112 74ACT11112 TI0103