Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
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Original
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PDF
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74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
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Original
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PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
74AC11158
Abstract: 74AC11158DW 74AC11158DWR 74AC11158N
Text: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
74AC11158
74AC11158DW
74AC11158DWR
74AC11158N
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
|
74AC11158
Abstract: 74AC11158DW 74AC11158DWR 74AC11158N
Text: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
74AC11158
SCAS071
500-mA
300-mil
74AC11158
74AC11158DW
74AC11158DWR
74AC11158N
|
C11158
Abstract: No abstract text available
Text: 74AC/ACT11158 Signetics Quad 2-Input Multiplexer; INV A C 11158: Product Specification ACT11158: Preliminary Specification ACL Products GENERAL INFORMATION FEATURES Output capability: ± 2 4 m A • CMOS AC and TTL (ACT) voltage level inputs • • 50Q
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OCR Scan
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PDF
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74AC/ACT11158
ACT11158:
10MHz
C11158
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