64LS138
Abstract: No abstract text available
Text: S N 5 4 LS 13 8 , SN 54S138, S N 74 LS 13 8 , S N 74 S 13 8 A 3-LINE TO 8-LINE D EC OD ERS/DEM U LTIPLEXERS DECEMBER 1972 —REVISED MARCH 1988 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems I I 3 Enable Inputs to Simplify Cascading
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54S138,
64LS138
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74ls138 truth table
Abstract: 74LS138 74 LS 138 DECODER connection for 74LS138 74LS138 3 to 8 decoder Pin demultiplexer 3 to 8 truth table 74ls138 demultiplexer LS138 LOGIC OF 74LS138 of 74LS138 3 to 8 decoder
Text: g MOTOROLA SN54/74LS138 1-0F-8 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/ Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel ex
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SN54/74LS138
1-of-24
LS138
1-of-32
LS138s
SN54/74LS138
74ls138 truth table
74LS138
74 LS 138 DECODER
connection for 74LS138
74LS138 3 to 8 decoder Pin
demultiplexer 3 to 8 truth table
74ls138 demultiplexer
LOGIC OF 74LS138
of 74LS138 3 to 8 decoder
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Untitled
Abstract: No abstract text available
Text: 138 AVG Semiconductors_ DDiT Technical Data DV74LS138 DV74ALS138 3 Line to 8 Line Decoder/Demultiplexer These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. One of eight lines
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DV74LS138
DV74ALS138
DV74LS138,
LS138
ALS138
1-800-AVG-SEMI
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ic 74 LS 138 DECODER
Abstract: IC 74ls138 74LS138 3 to 8 decoder notes 74LS138 1 to 8 decoder notes ic 74 138 DECODER
Text: g M OTOROLA SN 5 4 /7 4 L S 1 3 8 D E S C R IP T IO N — The L S T T L /M S IS N 5 4 L S /7 4 L S 1 38 is a high speed 1 -of-8 D ecoder/D em ultiplexer. This device is ideally suited for high speed bipolar m em ory ch ip select address decoding. The m ultiple input
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LS138s
ic 74 LS 138 DECODER
IC 74ls138
74LS138 3 to 8 decoder notes
74LS138 1 to 8 decoder notes
ic 74 138 DECODER
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block diagram of 74LS138 3 to 8 decoder
Abstract: block diagram of 74LS138 1 line to 16 line TTL 74ls138 74LS138 74LS138 3 to 8 74LS138 application note 74LS138 pin configuration 74LS138 3 to 8 decoder Pin of 74LS138 3 to 8 decoder 74ls138 3-8
Text: GD54/74LS138 3-TO-8-LINE DECODERS/DEMULTIPLEXERS Feature • Pin Configuration • D esigned Specifically for High S p e e d M em ory D ec o d e rs and Data Transm ission System s Incorporate 3 Enable Inputs to Simplify Cascading • A N D /O R Data R eception
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GD54/74LS138
block diagram of 74LS138 3 to 8 decoder
block diagram of 74LS138 1 line to 16 line
TTL 74ls138
74LS138
74LS138 3 to 8
74LS138 application note
74LS138 pin configuration
74LS138 3 to 8 decoder Pin
of 74LS138 3 to 8 decoder
74ls138 3-8
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LOGIC OF 74LS138
Abstract: pin for 74LS138 74LS138 3 to 8 decoder notes 74LS138 74LS138 pins 74l5138 of 74LS138 3 to 8 decoder 74ls138 function TTL 74ls138 74LS138 3 to 8 decoder Pin
Text: 74LS138, S138 Signetics Decoders/Dem ultiplexers 1-Of-8 D e co d e r/D e m u ltip le xe r Product Specification L o g ic P rod ucts FEATURES • Demultiplexing capability • Multiple input enable for easy expansion • Ideal for memory chip select decoding
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74LS138,
1-of-32
1N916,
1N3064,
500ns
LOGIC OF 74LS138
pin for 74LS138
74LS138 3 to 8 decoder notes
74LS138
74LS138 pins
74l5138
of 74LS138 3 to 8 decoder
74ls138 function
TTL 74ls138
74LS138 3 to 8 decoder Pin
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SN54ALS138
Abstract: SN54AS138 SN74ALS138 SN74AS138
Text: SN 54A LS138, S N 54A S 138, SN 74A LS138, SN 74A S138 3-LINE TO 8 LINE DECODERS/DEMULTIPLEXERS D 2 6 6 1 , A P R IL 1 9 8 2 - R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 1 3 8 , S N 5 4 A S 1 3 8 . . . J PACKAGE S N 7 4 A L S 1 3 8 , S N 7 4 A S 1 3 8 . . . D OR N PACKAGE
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SN54ALS138,
SN54AS138,
SN74ALS138,
SN74AS138
D2661,
300-mil
SN54AS138
SN74AS138
SN54ALS138
SN54AS138
SN74ALS138
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max3259
Abstract: ic 74 LS 138 DECODER
Text: S ig n e tic s 5 4 L S 1 3 8 , 5 4 S 1 3 8 Decoders/Demultiplexers 1-of-8 Decoder/Demultiplexer Product Specification Military Logic Products E1f E2 and one active High (E3). Every output will be High unless Ei and E2 are Low and E3 is High. This multiple enable
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1-of-32
54LS138,
54S138
500ns
500ns
54LSXXX
54SXXX
515ns
1N916
1N3064,
max3259
ic 74 LS 138 DECODER
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FUNCTIONAL APPLICATION OF 74LS138
Abstract: 74LS138 3 to 8 decoder Pin of 74LS138 3 to 8 decoder 74LS138 3 to 8 decoder notes 74LS138 pin diagram 74LS138 74ls138 function pin for 74LS138 LOGIC DESCRIPTION OF 74LS138 74LS138 application note
Text: A m 2 5 L S 13 8 • A m 5 4 LS/7 4 L S 1 3 8 3-Line To 8-Line Decoder/Demultiplexer D IS T IN C T IV E C H A R A C T E R IS T IC S L O G IC D IA G R A M • • In v e rtin g and n o n -in v e rtin g enable inputs A m 2 5 L S devices o ffe r the fo llo w in g im p ro ve m e n ts over
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Am25LS138
Am54LS/74LS138
Am25LS
MIL-STD-883
LS/54
LS/74LS138
FUNCTIONAL APPLICATION OF 74LS138
74LS138 3 to 8 decoder Pin
of 74LS138 3 to 8 decoder
74LS138 3 to 8 decoder notes
74LS138 pin diagram
74LS138
74ls138 function
pin for 74LS138
LOGIC DESCRIPTION OF 74LS138
74LS138 application note
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5 to 32 decoder using 4 t0 16 decoders
Abstract: LSI38 sn54138 LS138 SN54LS138 SN54S138 SN74LS138 SN74S138A
Text: SN54LS138, SN54S138, SN74LS138, SN74S13BA 3-LINE TO 8 LINE DECODERS/DEMULTIPLEXERS SDLS014 DECEMBER T9 7 2 — REVISED M A R C H 198 8 • Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems • 3 Enable Inputs to Simplify Cascading
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SN54LS138,
SN54S138,
SN74LS138,
SN74S138A
SDLS014
1972-flEVISED
5 to 32 decoder using 4 t0 16 decoders
LSI38
sn54138
LS138
SN54LS138
SN54S138
SN74LS138
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74HC138
Abstract: GD74HCT138 74HCT138 GD54HC138 GD74HC138 74HC 74ls138 demultiplexer
Text: GD54/74HC138, GD54/74HCT138 3-TO-8 LINE DECODER/DEMULTIPLEXER General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 3 8 . Each device has 3 Binary select A, B, and C , and decodes A 3-Bit address to 1 -of-8 active-LOW outputs. This device features three chip
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GD54/74HC138,
GD54/74HCT138
54/74LS138.
GD74HCT138
GD54HCT138
00042cib
74HC138
GD74HCT138
74HCT138
GD54HC138
GD74HC138
74HC
74ls138 demultiplexer
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Untitled
Abstract: No abstract text available
Text: GD54/74HC138, GD54/74HCT138 3-TO-8 LINE DECODER/DEMULTIPLEXER G eneral D e s c rip tio n These devices are identical in pinout to the 5 4 /7 4 L S 1 38. Each device has 3 Binary select A, B, and C , and decodes A 3-Bit address to 1 -of-8 active-LOW outputs. This device features three chip
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GD54/74HC138,
GD54/74HCT138
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SN54138
Abstract: SN74LS138 LS138 SN54LS138 SN54S138 SN74S138A gl 1151
Text: SN54LS138, SN54S138, SN74LS138, SN74S138A 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS D E C E M B E R 1972 — R E V IS E D M A R C H 1988 Designed Specifically for High-Speed: Memory Decoders Data Transmission Systems S N 54LS 138, S N 54S 138 SN 74LS 138, S N 74S 138A
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SN54LS13B,
SN54S138,
SN74LS138,
SN74S138A
1972-REVISED
usuall5012
SN74S138A
sn54s138
SN54138
SN74LS138
LS138
SN54LS138
gl 1151
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ic 74 LS 138 DECODER
Abstract: C455B
Text: U T 5 4 A C S 1 3 8 / U T 5 4 A C T S 13 8 Radiation-Hardened 3-Line to 8-Line Decoders/Demultiplexers PINOUTS FEATURES 16-Pin D IP Top View • 1.2 1 radiation-hardened CMOS - Latchup immune • High speed • Low power consumption • Single 5 volt supply
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16-pin
16-lead
UT54ACS138
UT54ACTS
UT54ACS138/UT54ACTS138
ic 74 LS 138 DECODER
C455B
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54S138
Abstract: 54ls138 TE307
Text: Signetics 54LS138, 54S138 Decoders/Demultiplexers l-of-8 Decoder/Demultiplexer Product Specification Military Logic Products FEATURES E, E2 and one active High (E3). Every output will be High unless E, and E 2 are Low and E3 is High. This multiple enable
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54LS138,
54S138
1-of-32
54LSXXX
54SXXX
500ns
500ns
s15ns
54S138
54ls138
TE307
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HBF4727A
Abstract: ZD 607 - triac ZD 607 - triac circuit hbf 4727a TDA3310 hbf4727 HBF4740 DTL-930 7-stage frequency divider BF479S
Text: / h o f t f o f m A T E ^SEMICONDUCTOR “ PRODUCTS 1979/80 I NT RODUCTI ON This publication aims to provide condensed information on the vast range of standard devices currently produced by SGS-ATES. For easy consultation the products have been divided into several sections according to the main product
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TC74LCX138F/FN/FT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74LCX138F, TC74LCX138FN, TC74LCX138FT LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS The TC74LCX138 is a high performance CMOS 3-to-8 DECODER. Designed for use in 3.3 Volt systems, it
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TC74LCX138F/FN/FT
TC74LCX138F,
TC74LCX138FN,
TC74LCX138FT
TC74LCX138
outpu97
OP16-P-300-1
705TYP
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dm8130
Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408
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54H00
54L00
54LS00
54H01
54L01
54LS01
54L02
54LS02
54L03
54LS03
dm8130
54175
DM74367
KS 2102
7486 ic truth table
signetics 2502
ci 8602 gn block diagram
ci 8602 gn
74s281
DM74LS76
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md74sc138
Abstract: M0541 74SC138 MD74SC137 748CE
Text: IV 1IT E L — Technical D ata MD54SC137, MD54SCS37, MD74SC137, MD748C837, ISO-CMOS Octal D ecoders/D em ultiplexers MD548C138, MDB48C139 M0548CS38, MD74SC138, O A N 'S e MD548CS38 MD748C139 MD748C838, MD748CE39 F eatures Ordering Information • E quivalent to 54/74L S ’ series
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MD54SC137,
MD548C138,
MDB48C139
MD54SCS37,
MD54SCB38,
MD54BCS39
MD74SC137,
MD74SC138,
MD748C139
MD74SCS37,
md74sc138
M0541
74SC138
MD74SC137
748CE
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Y6 DIODE
Abstract: No abstract text available
Text: TC7MET138AFK TOSHIBA CMOS Didital Integrated Circuit Silicon Monolithic TC7MET138AFK 3-to-8 Line Decoder The TC7MET138AFK is an advanced high speed CMOS 3-to-8 line decoder fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar
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TC7MET138AFK
TC7MET138AFK
Y6 DIODE
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TC74LCX138F/FN/FT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74LCX138F, TC74LCX138FN, TC74LCX138FT LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS The TC74LCX138 is a high performance CMOS 3-to-8 DECODER. Designed for use in 3.3 Volt systems, it
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TC74LCX138F/FN/FT
TC74LCX138F,
TC74LCX138FN,
TC74LCX138FT
TC74LCX138
OP16-P-300-1
TSSOP16-P-0044-0
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Untitled
Abstract: No abstract text available
Text: T O SH IB A TC74LCX138F/FN/FT TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74LCX138F, TC74LCX138FN, TC74LCX138FT LOW VOLTAGE 3-TO-8 LINE DECODER WITH 5V TOLERANT INPUTS AND OUTPUTS The TC74LCX138 is a high performance CMOS 3-to-8 DECODER. Designed for use in 3.3 Volt systems, it
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TC74LCX138F/FN/FT
TC74LCX138F,
TC74LCX138FN,
TC74LCX138FT
TC74LCX138
OP16-P-300-1
TSSOP16-P-0044-0
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Untitled
Abstract: No abstract text available
Text: TC7MET138AFK TOSHIBA CMOS Didital Integrated Circuit Silicon Monolithic TC7MET138AFK 3-to-8 Line Decoder The TC7MET138AFK is an advanced high speed CMOS 3-to-8 line decoder fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar
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TC7MET138AFK
TC7MET138AFK
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TC7MET138AFK
Abstract: No abstract text available
Text: TC7MET138AFK TOSHIBA CMOS Didital Integrated Circuit Silicon Monolithic TC7MET138AFK 3-to-8 Line Decoder The TC7MET138AFK is an advanced high speed CMOS 3-to-8 line decoder fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar
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TC7MET138AFK
TC7MET138AFK
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