64K DRAM Search Results

64K DRAM Result Highlights (5)

Part	Manufacturer	Description
4164-15FGS/BZA	Rochester Electronics LLC	4164 - DRAM, 64K X 1, 3-STATE OUTPUTS, 150 NS ACCESS TIME - Dual marked (8201006ZA)
4164-12JDS/BEA	Rochester Electronics LLC	4164 - DRAM, 64K X 1, 3-STATE OUTPUTS, 120 NS ACCESS TIME - Dual marked (8201008EA)
4164-15JDS/BEA	Rochester Electronics LLC	4164 - DRAM, 64K X 1, 3-STATE OUTPUTS, 150 NS ACCESS TIME - Dual marked (8201006EA)
TMS4030JL	Rochester Electronics LLC	TMS4030JL - TMS4030 - DRAM, 4KX1, 300ns, MOS, CDIP22
MD27C64-25	Rochester Electronics LLC	27C64 - 64K (8K x 8) EPROM

64K DRAM Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
KM428C64 Abstract: "Video RAM" Video RAM Text: KM428C64 CMOS VIDEO RAM 64K X 8 Bit CMOS Video RAM FEATURES GENERAL DESCRIPTION Dual port Architecture 64K x 8 bits RAM port 256 x 8 bits SAM port Performance range : . Parameter Speed . RAM access time tR A c RAM access time (tc A c ) The Samsung KM428C64 is a CMOS 64K x 8 bit Dual Port	OCR Scan	KM428C64 130ns 150ns 100ns 180ns KM428C64 "Video RAM" Video RAM	PDF
Untitled Abstract: No abstract text available Text: MT4C1664/5 64K X 16 D R AM MICRON DRAM 64K x 16 DRAM FAST PAGE MODE • Industry standard xl6 pinouts, timing, functions and packages • High-performance, CMOS silicon-gate process • Single +5V±10% power supply • Low power, 3mW standby; 225mW active, typical	OCR Scan	MT4C1664/5 225mW 256-cycle MT4C1664 MT4C1665 40-Pin	PDF
am9064 Abstract: cvp 45 Am90C644 Text: Am90C644 64K X 4 CMOS DUAL-ARRAY MEMORY ADVANCE INFORMATION 64K x 4 organization High-speed access: tpAC - 1 00 ns Write-per-Bit mask allows separatewrite controls for each of the four DRAM input bits On-chip video shifter with up to 100Megapixel/sec. bandwidth	OCR Scan	Am90C644 100Megapixel/sec. 144-bit WF010 WF000372 am9064 cvp 45	PDF
as42c4064 Abstract: vram dual port Dual Port V-RAM Text: AS42C4064 883C 64K x 4 VRAM AUSTIN SEMICONDUCTOR, INC. Limited Supply - Consult Factory 64K x 4 DRAM WITH 256 x 4 SAM VRAM AVAILABLE AS MILITARY SPECIFICATION PIN ASSIGNMENT Top View • MIL-STD-883 24-Pin DIP (D-11) FEATURES • • • • • • •	Original	AS42C4064 MIL-STD-883 24-Pin 256-cycle DS000013 vram dual port Dual Port V-RAM	PDF
Untitled Abstract: No abstract text available Text: AS42C4064 883C 64K X 4 VRAM AUSTIN SEMICONDUCTOR, INC. Limited Supply - Consult Factory VRAM 64K x 4 DRAM WITH 256 x 4 SAM AVAILABLE AS MILITARY SPECIFICATION PIN ASSIGNMENT Top View • M IL-STD-883 24-Pin DIP (D-11) FEATURES Industry standard pinout, tim ing and functions	OCR Scan	AS42C4064 IL-STD-883 24-Pin 256-cycle DS000013 OSO00026	PDF
Untitled Abstract: No abstract text available Text: MT4C1670/1 L 64K X 16 DRAM \|U \|IC =R O N 64K x 16 DRAM STATIC COLUMN MODE, LOW POWER, EXTENDED REFRESH FEATURES PIN ASSIGNMENT Top View • Industry standard x l6 pinouts, tim ing, functions and packages • High-perform ance, CM OS silicon-gate process	OCR Scan	MT4C1670/1 MT4C1670 MT4C1671	PDF
Untitled Abstract: No abstract text available Text: AUSTIN SEMICONDUCTOR, INC. DRAM AS4C4067 883C 64K X 4 DRAM 64K x 4 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATION PIN ASSIGNMENT Top View SMD 5962-92132 MEL-STD-883 18-Pin DIP FEATURES Industry standard pinout and timing All inputs, outputs and clocks are fully TTL	OCR Scan	AS4C4067 MEL-STD-883 18-Pin 150mW 256-cycle MIL-STD-883 QGG1403	PDF
Untitled Abstract: No abstract text available Text: HIGH-SPEED 3.3V 64K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS PRELIMINARY IDT70V7288S/L Features 64K x 16 Bank-Switchable Dual-Ported SRAM Architecture processor communications; interrupt option Interrupt flags with programmable masking	OCR Scan	IDT70V7288S/L 100-pin 16-bit O-136,	PDF
Untitled Abstract: No abstract text available Text: Integrated D evice Technology, Inc. 64K x 32, 3.3V SYNCHRONOUS SRAM WITH PIPELINED OUTPUTS AND INTERLEAVED/LINEAR BURST COUNTER, SINGLE CYCLE DESELECT PRELIMINARY IDT71V632 FEATURES: DESCRIPTION: • 64K x 32 m em ory configuration • Supports high system speed:	OCR Scan	IDT71V632 T58LC 64K32D MO-136, 2S771	PDF
Untitled Abstract: No abstract text available Text: MT4C1664/5 L 64K X 16 DRAM I^ IIC R O N 64K x 16 DRAM DRAM LOW POWER EXTENDED REFRESH FEATURES • Industry standard x l6 pinouts, timing, functions and packages • High-perform ance, CM OS silicon-gate process • Single +5V ±10% power supply • All device pins are fully TTL compatible	OCR Scan	MT4C1664/5 MT4C1664 MT4C1665 225mW 125jxs 40-Pin	PDF
92132 Abstract: 64kx4 AS4C4067 1CP-N15 CSH110 Text: AUSTIN SEMICONDUCTOR, INC. a s 4C4067 64K X 883C 4 DRAM 64K x 4 DRAM DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICA TIO N • • PIN ASSIGNMENT Top View S\1D 5962-92132 MIL-STD-883 18-Pin DIP FEATURES • • • • • • • • Industry standard pinout and timing	OCR Scan	AS4C4067 SMD5962-92132 MIL-STD-883 150mW 256-cycle 120a-. 150ns MIL-STD-883 92132 64kx4 1CP-N15 CSH110	PDF
Untitled Abstract: No abstract text available Text: MT4C4067 883C 64K x 4 DRAM AUSTIN SEMICONDUCTOR, INC. DRAM 64K x 4 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATION PIN ASSIGNMENT Top View • SMD 5962-92132 • MIL-STD-883 18-Pin DIP (D-6) FEATURES • Industry standard pinout and timing • All inputs, outputs and clocks are fully TTL	Original	MT4C4067 MIL-STD-883 18-Pin 150mW 256-cycle MIL-STD-883 DS000012	PDF
Untitled Abstract: No abstract text available Text: GLT41016-10E 64k x 16 Embedded EDO DRAM FEATURES ◆ Logical organization: 64k x 16 bits ◆ Physical organization: 256 x 256 x 16 ◆ Single 3.3V ± 0.3V power supply ◆ 256 cycle refresh in 4 ms ◆ Refresh modes: RAS only, CBR, and Hidden ◆ Dual CAS for Byte Write and Byte Read control	Original	GLT41016-10E WL/256K, 200Mbyte	PDF
AIC6250 Abstract: AIC-6110 Text: adaptec A l O - f i l “1 H U I I U Single-Chip SCSI Mass Storage Controller I x IU DATA BUFFER SRAM 64K MAX DRAM 64K MAX I SCSI BUS 8 MB/sec 3.5/2.5 INCH HARD DISK AIC-6110 5 MB/sec MASS STORAGE CONTROLLER 24 Mb/sec DATA SEPARATOR MICROPROCESSOR INTEL 80C196	OCR Scan	AIC-6110 31-word 32-bit 48-bit 16-bit AIC-6250. AIC6250	PDF

DALLAS DS80C320 Abstract: DS80C320-QCG T movx 80C32 DS80 DS80C320 DS80C320-FCG DS80C320-FNG DS80C320-QCG QDG775S Text: DS80C320 DALLAS SEMICONDUCTOR FEA TU R ES • 80C32-Compatible - Pin-compatible Standard 8051 instruction set - F our8-bit I/O ports Three 16-bit timer/counters 256 bytes scratchpad RAM Multiplexed address/data bus Addresses 64K bytes ROM and 64K bytes RAM	OCR Scan	DS80C320 80C32-Compatible 16-bit abl4130 000777a 44-PIN 2bl413Q DALLAS DS80C320 DS80C320-QCG T movx 80C32 DS80 DS80C320 DS80C320-FCG DS80C320-FNG DS80C320-QCG QDG775S	PDF
GLT41016-10E Abstract: GLT44016 Text: GLT41016-10E 64k x 16 Embedded EDO DRAM FEATURES ◆ Logical organization: 64k x 16 bits ◆ Physical organization: 256 x 256 x 16 ◆ Single 3.3V ± 0.3V power supply ◆ 256 cycle refresh in 4 ms ◆ Refresh modes: RAS only, CBR, and Hidden ◆ Dual CAS for Byte Write and Byte Read control	Original	GLT41016-10E WL/256K, 200Mbyte GLT41016-10E GLT44016	PDF
4264 dram Abstract: No abstract text available Text: MICRON T E C H N O L O G Y INC 55E D • blllS4'ì DDDSb?^ 153 ■ MRN PRELIMINARY W1T4C4264 883C 64K X 1 DRAM \| W \|! C R Q N MILITARY DRAM 64K X 1 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • MIL-STD-883, Class B	OCR Scan	W1T4C4264 MIL-STD-883, 16-Pin 150mW 256-cycle MT4C4264 4264 dram	PDF
s89c Abstract: MT4C4067 64k DRAM Text: MICRON TECHNOLOGY INC SSE D 0 0 Q5 7 2 7 7 3 b • MRN b lllS H T PRELIMINARY MT4C4067 883C 64K X 4 DRAM IC R Ü N MILITARY DRAM 64K X 4 DRAM FAST PAGE MODE AVAILABLE AS MILITARY SPECIFICATION PIN ASSIGNMENT Top View • MIL-STD-883, Class B 18-Pin DIP (D -6)	OCR Scan	MT4C4067 MIL-STD-883, 18-Pin 150mW 256-cycle MIL-STD-883 s89c 64k DRAM	PDF
Untitled Abstract: No abstract text available Text: SAM S UN G E L E C T R O N I C S INC b7E D • 7=11,4145 G O l b S D ? 3T4 H S M ä K KM428C64 CMOS VIDEO RAM 64K X 8 Bit CMOS Video RAM FEATURES ■ Dual port Architecture 64K x 8 bits RAM port 256 x 8 bits SAM port - Performance range : The Samsung KM428C64 is a CMOS 64K x 8 bit Dual Port	OCR Scan	KM428C64 KM428C64 130ns 150ns 180ns	PDF
A101 Abstract: CY7C1333F CY7C1333F-100AC Text: CY7C1333F 2-Mbit 64K x 32 Flow-through SRAM with NoBL Architecture Functional Description[1] Features • Can support up to 117-MHz bus operations with zero wait states. Data is transferred on every clock. The CY7C1333F is a 3.3V, 64K x 32 Synchronous	Original	CY7C1333F 117-MHz CY7C1333F A101 CY7C1333F-100AC	PDF
A101 Abstract: CY7C1333F CY7C1333F-100AC 20306 Text: CY7C1333F 2-Mbit 64K x 32 Flow-through SRAM with NoBL Architecture Functional Description[1] Features • Can support up to 117-MHz bus operations with zero wait states. Data is transferred on every clock. The CY7C1333F is a 3.3V, 64K x 32 Synchronous	Original	CY7C1333F 117-MHz CY7C1333F A101 CY7C1333F-100AC 20306	PDF
20306 Abstract: No abstract text available Text: CY7C1333F 2-Mbit 64K x 32 Flow-through SRAM with NoBL Architecture Functional Description[1] Features • Can support up to 117-MHz bus operations with zero wait states. Data is transferred on every clock. The CY7C1333F is a 3.3V, 64K x 32 Synchronous	Original	CY7C1333F 117-MHz 100-MHz CY7C1333F 20306	PDF
Untitled Abstract: No abstract text available Text: CY7C1333F 2-Mbit 64K x 32 Flow-through SRAM with NoBL Architecture Functional Description[1] Features • Can support up to 117-MHz bus operations with zero wait states. Data is transferred on every clock. The CY7C1333F is a 3.3V, 64K x 32 Synchronous	Original	CY7C1333F 117-MHz 100-MHz CY7C1333F	PDF
Untitled Abstract: No abstract text available Text: CMOS VIDEO RAM ÍM424C64 6 4 K X 4 Bit CMOS VIDEO RAM FEATURES GENERAL DESCRIPTION • Dual Port A rchitecture 64K x 4 bits R AM port The Samsung KM424C64 is a CMOS 64K x 4 bit Dual Port DRAM. It consists of a 6 4 K x 4 dynamic random access memory RAM port and 256 x 4 static serial •	OCR Scan	M424C64 KM424C64 KM424C64 24-PIN	PDF

64K DRAM Search Results

64K DRAM Result Highlights (5)

64K DRAM Datasheets Context Search

KM428C64

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am9064

as42c4064

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92132

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AIC6250

DALLAS DS80C320

GLT41016-10E

4264 dram

s89c

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A101

A101

20306

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