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    54H10 Search Results

    54H10 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54H10J/C Rochester Electronics LLC 54H10 - NAND Gate, TTL/H/L Series, 3-Func, 3-Input, TTL Visit Rochester Electronics LLC Buy
    54H102FM Rochester Electronics LLC 54H102 - J-K Flip-Flop, 1-Func, Negative Edge Triggered, TTL, CDFP14 Visit Rochester Electronics LLC Buy
    54H108J/C Rochester Electronics LLC 54H108J/C Visit Rochester Electronics LLC Buy
    SNJ54H102J Rochester Electronics LLC J-K Flip-Flop, TTL/H/L Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP14, Visit Rochester Electronics LLC Buy
    SNJ54H10W Rochester Electronics LLC NAND Gate, TTL, CDFP14 Visit Rochester Electronics LLC Buy
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    54H10 Price and Stock

    Rochester Electronics LLC SN54H10W

    IC GATE NAND
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    Rochester Electronics LLC SNJ54H102J

    J-K FLIP-FLOP
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    Lodestone Pacific B-EIM41X20.5-4H-10-2-PBT-S

    BOBBIN FOR 41MM LAM, 10 PINS, 2
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    Rochester Electronics LLC 54H108J/C

    54H108J/C
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    Rochester Electronics 54H108J/C 279 1
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    Rochester Electronics LLC SNJ54H106W

    J-K FLIP-FLOP
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    54H10 Datasheets (18)

    Part ECAD Model Manufacturer Description Curated Type PDF
    54H10 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54H101 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54H101DM Fairchild Semiconductor JK Edge Triggered Flip-Flop Scan PDF
    54H101FM Fairchild Semiconductor JK Edge Triggered Flip-Flop Scan PDF
    54H102 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54H102DM Fairchild Semiconductor JK Edge Triggered Flip-Flop Scan PDF
    54H102FM Fairchild Semiconductor JK Edge Triggered Flip-Flop Scan PDF
    54H103 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54H103DM Fairchild Semiconductor Dual JK Edge Triggered Flip-Flop Scan PDF
    54H103FM Fairchild Semiconductor Dual JK Edge Triggered Flip-Flop Scan PDF
    54H106 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54H106DM Fairchild Semiconductor Dual JK Edge Triggered Flip-Flop Scan PDF
    54H106FM Fairchild Semiconductor Dual JK Edge Triggered Flip-Flop Scan PDF
    54H108 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    54H108DM Fairchild Semiconductor Dual JK Edge Triggered Flip-Flop Scan PDF
    54H108FM Fairchild Semiconductor Dual JK Edge Triggered Flip-Flop Scan PDF
    54H10DM Fairchild Semiconductor Triple 3-Input NAND Gate Scan PDF
    54H10FM Fairchild Semiconductor Triple 3-Input NAND Gate Scan PDF

    54H10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74H106

    Abstract: 54H106 ScansUX995
    Text: FAIRCHILD HIGH SPEED TTL/SSI . 9H106/54H106, 74H106 DUAL JK EDGE TRIGGERED FLIP-FLOP WITH SEPARATE PRESETS, CLEARS AND CLOCKS D E S C R IP T IO N - T h e H S T T L /S S I 9 H 1 0 6 /5 4 H 1 0 6 , 7 4 H 1 0 6 is a H igh Speed J K N eg ative Edge T rig g e re d flip - f lo p . T h e y fe a tu re in d iv id u a l J, K ,


    OCR Scan     		PDF 9H106/54H106, 74H106 280ft 54H106 ScansUX995

    121122

    Abstract: 74H101 ScansUX995
    Text: FAIRCHILD HIGH SPEED TTL/SSI . 9H101/54H101, 74H101 JK EDGE TRIGGERED FLIP-FLOP WITH AND-OR INPUTS D E S C R IP T IO N — T h e H S T T L /S S I 9 H 1 0 1 /5 4 H 1 0 1 , 7 4 H 1 0 1 is a H igh S peed J K N eg ative Edge T rig g e re d f lip - f lo p . T h e A N D - O R gate in p u ts are


    OCR Scan     		PDF 9H101/54H101, 74H101 280ft 121122 ScansUX995

    74H103

    Abstract: clock schematic ScansUX995 Flip-Flop on off 54H103
    Text: FAIRCHILD HIGH SPEED TTL/SSI • 9H103/54H103, 74H103 DUAL JK EDGE TRIGGERED FLIP-FLOP WITH SEPARATE CLEARS AND CLOCKS DESCRIPTION - The HSTTL/SSI 9H 103/54H 103, 74H 103 is a High Speed JK Negative Edge Triggered flip -flo p . They feature individual J, K,


    OCR Scan     		PDF 9H103/54H103, 74H103 clock schematic ScansUX995 Flip-Flop on off 54H103

    74H102

    Abstract: 10mAVCC ScansUX995
    Text: FAIRCHILD HIGH SPEED TTL/SSI . 9H102/54H102, 74H102 JK EDGE TRIGGERED FLIP-FLOP WITH AND INPUTS DESCRIPTION — The HSTTL/SSI 9H 102/54102, 74H102 is a High Speed JK Negative Edge Triggered flip-flop. They feature gated JK inputs and an asynchronous clear input. The A N D gate inputs are inhibited while the clock input is LOW; when the clock goes H IG H , the inputs are


    OCR Scan     		PDF 9H102/54H102, 74H102 9H102/54102, 10mAVCC ScansUX995

    74H108

    Abstract: clock schematic V126 ScansUX995
    Text: FAIRCHILD HIGH SPEED TTL/SSI . 9H108/54H108, 74H108 DUAL JK EDGE TRIGGERED FLIP-FLOP WITH SEPARATE PRESETS AND A COMMON CLEAR AND CLOCK D E S C R IP T IO N — T h e H S T T L /S S I 9 H 1 0 8 /5 4 H 1 0 8 , 7 4 H 1 0 8 is a H igh Speed J K N eg ative Edge Trig g e re d f lip -flo p . T h e y fe a tu re in d iv id u a l J ,K ,


    OCR Scan     		PDF 9H108/54H108, 74H108 clock schematic V126 ScansUX995

    74H10

    Abstract: ScansUX994
    Text: FAIRCHILD HIGH SPEED TTL/SSI . 9H10/54H10, 74H10 TRIPLE 3-INPUT NAND GATE SCH EM ATIC DIA G R A M EACH G ATE LOGIC A N D CO NNECTIO N D IA G R A M DIP (TOP VIEW ) F LA TPA K (TOP VIEW ) 14 Ue { 13 12 11 10 9 5rJ rb I GNO L U L ilL U L llU L llL J Positive lo gic: Y = A B C


    OCR Scan     		PDF 9H10/54H10, 74H10 9H10XM/54H10XM 9H10XC/74H10XC availabl-40 280S7 ScansUX994

    MC3100

    Abstract: MC3005L MC3005F MC3105F MC3105L
    Text: / TRIPLE 3-INPUT "NANO" GATE | V MTTL III MC3100/3000 series MC3105F * MC3005F MC3105L * MC3005L,P 54H10J (74H10J,N) 1 / 3 O F C IR C U IT SHOWN T h is package consists o f th re e 3-in p u t N AN D gates. Each gate m ay b e used as an inverter, o r tw o gates


    OCR Scan     		PDF MC3105F MC3005F MC3105L MC3005L 54H10J) 74H10J MC3100/3000 MMO61B0 O7000 DSP56002 MC3100 MC3105F MC3105L

    dy 255

    Abstract: 74s405 H R C M F 2J 225 Fairchild 9960 nixie driver 9614 line driver ci 8602 gn block diagram FJH211 Fairchild msi cul9960 variable frequency circuit diagram using IC 555
    Text: IN THE, BOSTON - 6 17- 4 4 * A SUBSIDiA) ./ OF DUCOMMUN INCORPOfiATED S, MASS vw . JU N E 1 97 S Fairchild Semiconductor TTL Data Book Contents And Section Selector If you know the correct 5400, 7400, 9300 or 9600 device type number, find the correct page in the


    OCR Scan     		PDF

    transistor k49

    Abstract: 54H00 74H00 MC1741C MC1741CP1 MCC1741C MCC3000
    Text: LINEAR INTEGRATED CIRCUIT CHIPS G E N E R A L D ESCRIPTIO N M otorola now o ffe rs a very broad selection o f linear integrated c irc u it chips. Am ong the types o f circuits w hich compose the linear fa m ily there are: A . Operational A m p lifie rs B. Voltage Regulators


    OCR Scan     		PDF MCC74H53 MCC54H53 39x45 MCC74H54 MCC54H54 MCC74H55 MCC54H55 38x42 MCC74H60 transistor k49 54H00 74H00 MC1741C MC1741CP1 MCC1741C MCC3000

    transistor k49

    Abstract: MC1741C MC1741CP1 MCC1741C MCC54H00 MCC74H00 MCC3000
    Text: L IN E A R IN T E G R A T E D C IR C U IT CHIPS G E N E R A L D E S C R IP T IO N M o to r o la n o w o ffe rs a ve ry b ro a d se le c tio n o f lin e a r integ rated c ir c u it c h ip s . A m o n g th e ty p e s o f c ir c u its w h ic h c o m p o se th e lin e a r f a m ily th e re are:


    OCR Scan     		PDF MCC74H53 MCC54H53 39x45 MCC74H54 MCC54H54 MCC74H55 MCC54H55 38x42 MCC74H60 transistor k49 MC1741C MC1741CP1 MCC1741C MCC54H00 MCC74H00 MCC3000

    NAND Gate 3-Input 7410

    Abstract: 74LS10PC
    Text: 10 CO NNECTIO N DIAGRAMS PINO UT A '''54/7410 ^é4H/74H10 ^54S/74S10 ö / ' o -h? ^ 4 L S /7 4 L S 1 0 ^ / y 7 TRIPLE 3-INPUT NAND GATE ORDERING CODE: See Section 9 PIN PKGS OUT CO M M ERCIAL GRADE M ILITARY GRADE V cc = +5.0 V ±5%, T a = 0° C to +70° C


    OCR Scan     		PDF 4H/74H10 54S/74S10 7410PC, 74H10PC 74S10PC, 74LS10PC 7410DC, 74H10DC 74S10DC, 74LS10DC NAND Gate 3-Input 7410

    Untitled

    Abstract: No abstract text available
    Text: TYPES 54H101, SN74H101 NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND •OR-GATED j- K R E V ISE D DE C EM B ER 1983 SN64H101_ I PA CKAG E Package Options Include Plastic and Ceramic D IP s SN 74H W I_ I OR N PA CKAG E TO P VIEW ! * Dependable Texas Instruments Quality


    OCR Scan     		PDF SN54H101, SN74H101 SN64H101_ 12DK2B SN64H101

    SN54H103

    Abstract: SN74H103 SN54H1
    Text: TYPES 54H103, SN74H103 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR RE V ISE D DE C EM B ER 19B3 SN 5 4 H 1 0 3 . . . J O R W P A C K A G E SN 7 4 H 1 0 3 . . . J OR N P A C K A G E Pa ck age Options Include Plastic and Ceram ic D IP s TOP VIEW


    OCR Scan     		PDF SN54H103, SN74H103 SN54HI03 SN54H103 SN54H1

    SN74H101

    Abstract: No abstract text available
    Text: TYPES 54H101, SN74H101 AND-OR-GATED J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET E V I S E D D E C E M B E R 1983 SN64H101 I PA CK A G E SN74HTO1 I OR N PA CK A G E Package Options Include Plastic and


    OCR Scan     		PDF SN54H101, SN74H101 SN54H101

    74s188 programming

    Abstract: 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions
    Text: The E ngineering Staff of TEXAS INSTRUMENTS INCORPORATED Semiconductor Memory Data Book y for \ T exas In Design Engineers s t r u m e n t s >le of Contents • Alphanumeric Index • GENERAL INFORMATION Selection Guides • Glossary INTERCHANGEABILITY GUIDE


    OCR Scan     		PDF 38510/MACH MIL-M-38510 74s188 programming 74S471 N82S06 74S470 dip18 package str 52100 MARKING CODE N-CHANNEL MOS FIELD EFFECT TRANSISTOR 74S472 PROM PROGRAMMING 8080a 74S287 programming instructions

    itt 7441

    Abstract: transistor fcs 9012 7446 BCD to 7-segment Fairchild dtl catalog Truth Table 74192 7400 quad 2-input NAND gate truth-table 7449 BCD to 7-segment 7483 truth table Motorola Diode 54H01 semiconductors cross reference
    Text: TTL DATA BOOK Fairchild Semiconductor TTL Data Book Contents And Section Selector If you know the correct 5400, 7400, 9300 or 9600 device type number, find the correct page in the Numerical Index. If you are trying to choose the best device for your application, consult the


    OCR Scan     		PDF APP-161 1-of-16 12-lnput itt 7441 transistor fcs 9012 7446 BCD to 7-segment Fairchild dtl catalog Truth Table 74192 7400 quad 2-input NAND gate truth-table 7449 BCD to 7-segment 7483 truth table Motorola Diode 54H01 semiconductors cross reference

    Standard TTL AOI Dual 2-Wide 2-Input

    Abstract: of 7400 Series - TTL 54175 LN 5406 CD 5401 C5445 7400 J-K Flip-Flop 4 nand dip 16 supply voltage 30 v
    Text: LANSDALE SEMICONDUCTOR 1 7E D • ' 5 3 h c1AQ3 DG003QÖ T-H3-ÌJ5 7 ■ T - H t r O l - O '! T -V 6 -0 7 -O S ' MAXIMUM RATINGS Rating Supply Voltage - Vcc T '4 S - 2 3 - 0 5 T '^ S -23-13 Value Unit +7.0 Vdc T -W -H Supply Operating Voltage Range 4.5 to 5.5


    OCR Scan     		PDF DG003QÖ 14-LEAD 16-LEAD 10-LEAD 24-LEAD Standard TTL AOI Dual 2-Wide 2-Input of 7400 Series - TTL 54175 LN 5406 CD 5401 C5445 7400 J-K Flip-Flop 4 nand dip 16 supply voltage 30 v

    SN74ALS123

    Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
    Text: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS


    OCR Scan     		PDF MIL-M-38510 SN74ALS123 SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138

    dm8130

    Abstract: 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76
    Text: 19 7 6 N atio n al S e m ico n d u cto r C o rp . p 1 ? I m • ' % TTL Data Book D EV IC E MIL i 2502 2503 2504 5400 54H00 54L00 54LS00 5401 54H01 54L01 54LS01 5402 54L02 54LS02 5403 54L03 54LS03 5404 54H04 54L04 54LS04 5405 54H05 54L05 54LS05 5406 5407 5408


    OCR Scan     		PDF 54H00 54L00 54LS00 54H01 54L01 54LS01 54L02 54LS02 54L03 54LS03 dm8130 54175 DM74367 KS 2102 7486 ic truth table signetics 2502 ci 8602 gn block diagram ci 8602 gn 74s281 DM74LS76

    DM74367

    Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
    Text: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,


    OCR Scan     		PDF

    SN7449

    Abstract: 54175 SN7401 74L42 SN7437 SN74S40
    Text: Ordering Instructions and Mechanical Data INTEGRATED CIRCUITS MECHANICAL DATA ORDERING INSTRUCTIONS Electrical characteristics presented in this catalog, unless otherwise noted, apply for circuit type s listed in the page heading regardless of package. Except for diode arrays, ECL, and MOS devices, the availability of a circuit function in a


    OCR Scan     		PDF SN15312 SN15325, SN15370 SN7449 54175 SN7401 74L42 SN7437 SN74S40

    Untitled

    Abstract: No abstract text available
    Text: TQ MAXIMUM RATINGS Rating Value Unit Supply Voltage - Vcc 7.0 V Input Voltage - Vjn 5.5 V Output Voltage - Vout 5.5 V -55 to +125 °C MOTOROLA INTEGRATED CIRCUITS 54H00 Series 74H00 Series Operating Free-Air Temperature Range TTL III circuits comprise a family


    OCR Scan     		PDF 54H00 74H00 54H00/C 16-LEAD 10-LEAD 24-LEAD

    CD 76 13 CP

    Abstract: 54H108DM 54H108FM 74H108DC 74H108FC 74H108PC
    Text: 108 C O N N E C T IO N DIAGRAM P IN O U T A 54H/74H108 6//^ 7 DUAL JK E D G E -T R IG G E R E D F LIP -F LO P With Separate Sets, A Com m on Clear and Clock K, [7 TTI Vcc ÏT Iso i Qi |T D ESCRIPTION — T h e ’ 108 is a h ig h sp eed J K n e g a tive e d g e -trig g e re d flip ­


    OCR Scan     		PDF 54H/74H108 54/74H CD 76 13 CP 54H108DM 54H108FM 74H108DC 74H108FC 74H108PC

    CD 76 13 CP

    Abstract: No abstract text available
    Text: 108 CONNECTION DIAGRAM PINOUT A 54H/74H108 6 //t>/7 DUAL JK EDGE-TRIGGERED FLIP-FLOP With Separate Sets, A Common Clear and Clock DESCRIPTION — The '108 is a high speed J K negative edge-triggered flipflop. It features individual J , K, and asynchronous Set inputs to each flip-flop


    OCR Scan     		PDF 54H/74H108 54/74H CD 76 13 CP