Untitled
Abstract: No abstract text available
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES SCLS050 – MARCH 1987 – REVISED APRIL 1993 • • • • 54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
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Original
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54ACT11030,
74ACT11030
SCLS050
500-mA
300-mil
54ACT11030
74ACT11030
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PDF
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54ACT11030
Abstract: 74ACT11030 74ACT11030DR
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES SCLS050 – MARCH 1987 – REVISED APRIL 1993 • • • • 54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
|
Original
|
54ACT11030,
74ACT11030
SCLS050
54ACT11030
500-mA
300-mil
54ACT11030
74ACT11030
74ACT11030DR
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PDF
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54ACT11030
Abstract: 74ACT11030
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES SCLS050 – MARCH 1987 – REVISED APRIL 1993 • • • • 54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
|
Original
|
54ACT11030,
74ACT11030
SCLS050
54ACT11030
500-mA
300-mil
54ACT11030
74ACT11030
|
PDF
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74ACT11030D
Abstract: No abstract text available
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES SCLS050 – MARCH 1987 – REVISED APRIL 1993 • • • • 54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
|
Original
|
54ACT11030,
74ACT11030
SCLS050
500-mA
300-mil
54ACT11030
74ACT11030
74ACT11030D
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PDF
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54ACT11030
Abstract: 74ACT11030 74ACT11030DR
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES SCLS050 – MARCH 1987 – REVISED APRIL 1993 • • • • 54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
|
Original
|
54ACT11030,
74ACT11030
SCLS050
54ACT11030
500-mA
300-mil
54ACT11030
74ACT11030
74ACT11030DR
|
PDF
|
54ACT11030
Abstract: 74ACT11030 y12e
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES SCLS050 – MARCH 1987 – REVISED APRIL 1993 • • • • 54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout
|
Original
|
54ACT11030,
74ACT11030
SCLS050
54ACT11030
500-mA
300-mil
54ACT11030
74ACT11030
y12e
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PDF
|
D2957
Abstract: 1987-REVISEDAPRIL
Text: 54ACT11030,74ACT11030 8-INPUT POSITIVE-NAND GATES _ D2957. MARCH 1987-REVISEDAPRIL 1993 Inputs Are TTL*Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-PIn V^c and GNO Configurations Minimize High-Speed Switching Noise EPIC Enhanced-Perlormance Implanted
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OCR Scan
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54ACT11030
74ACT11030
D2957.
1987-REVISEDAPRIL
500-mA
300-mll
D2957,
D2957
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PDF
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54AC11030
Abstract: 54ACT11030 74AC11030 74ACT11030 D2957
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES TI0059— D2957, MARCH 1987— REVISED M ARCH 1990 54A C T11030 I PACKAGE 74ACT11030 . . . D OR N PACKAGE Inputs are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout TOP VIEW Center-Pin V q c and GND Configurations to
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OCR Scan
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54ACT11030,
74ACT11030
TI0059â
D2957,
500-mA
300-mil
54ACT11030
54AC11030
74AC11030
74ACT11030
D2957
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PDF
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Untitled
Abstract: No abstract text available
Text: 54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES TI0059— D2957, MARCH 1987— REVISED MARCH 1990 54ACT11030 . . . J PACKAGE 74ACT11030 . . D OR N PACKAGE • Inputs are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout TOP VIEW
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OCR Scan
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54ACT11030,
74ACT11030
TI0059--
D2957,
500-mA
300-mil
54ACT11030
74ACT11030
JL15V
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PDF
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