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    Texas Instruments SNJ54AC11010J

    NAND Gate, AC Series, 3-Func, 3-Input, CDIP16 '
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    Rochester Electronics SNJ54AC11010J 150 1
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    54AC11010 Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Type PDF
    54AC11010 Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATES Original PDF
    54AC11010 Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATES Original PDF
    54AC11010FK Texas Instruments IC NAND GATE TRIPLE 3IN CMOS 20LCCC Original PDF
    54AC11010J Texas Instruments IC NAND GATE TRIPLE 3IN CMOS 16CDIP Original PDF

    54AC11010 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    54AC11010

    Abstract: 74AC11010
    Text: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS057 – MAY 1987 – REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		PDF 54AC11010, 74AC11010 SCLS057 54AC11010 500-mA 300-mil 54AC11010 74AC11010

    54AC11010

    Abstract: 74AC11010
    Text: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS057 – MAY 1987 – REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		PDF 54AC11010, 74AC11010 SCLS057 54AC11010 500-mA 300-mil 54AC11010 74AC11010

    Untitled

    Abstract: No abstract text available
    Text: 54AC11010, 74AC11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ăą SCLS057 − MAY 1987 − REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		PDF 54AC11010, 74AC11010 SCLS057 54AC11010 500-mA 300-mil

    54AC11010

    Abstract: 74AC11010
    Text: 54AC11010, 74AC11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ăą SCLS057 − MAY 1987 − REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original     		PDF 54AC11010, 74AC11010 SCLS057 54AC11010 500-mA 300-mil 54AC11010 74AC11010

    5962L0053605VYC

    Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
    Text: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A


    Original     		PDF MIL-HDBK-103AJ MIL-HDBK-103AH MIL-HDBK-103AJ 5962L0053605VYC 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA

    Untitled

    Abstract: No abstract text available
    Text: 54AC11010,74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES D2957, MAY 1987 - REVISED APRIL 1993 • ■ * Flow-Through Architecture Optimizes PCB Layout I I • Center-Pin Vqq and GND Configurations Minimize High-Speed Switching Noise | • EPIC'" Enhanced-Performance Implanted


    OCR Scan     		PDF 54AC11010 74AC11010 D2957, 500-mA 300-mil 54AC11010

    Untitled

    Abstract: No abstract text available
    Text: 54AC11010,74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES D2957, MAY 1987 - REVISED APRIL 1983 Flow-Through Architecture Optimizes PCB Layout Center-PIn Vqc and GND Configurations Minimize High-Speed Switching Noise EP IC “ Enhanced-Performance Implanted CMOS 1-|j.m Process


    OCR Scan     		PDF 54AC11010 74AC11010 D2957, 500-mA 300-mll

    S2-34

    Abstract: No abstract text available
    Text: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES TI0048— D2957, M AY 1987—R EVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11010 . . . J PACKAGE 74AC11010 . . . 0 OR N PACKAGE TOP VIEW • Center-PIn Vq c and GND Configurations to


    OCR Scan     		PDF 54AC11010, 74AC11010 TI0048-- D2957, 1987--R 500-mA 300-mil 54AC11010 S2-34

    54AC11010

    Abstract: 74AC11010 D2957
    Text: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES TI0048— D2957, MAY 1987—REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11010 . . . J PACKAGE 74AC11010 . . . D O R N PACKAGE TOP VIEW Center-Pin V q C and GND Configurations to


    OCR Scan     		PDF 54AC11010, 74AC11010 TI0048â D2957, 500-mA 300-mil 54AC11010 74AC11010 D2957

    54900

    Abstract: 54AC10 54AC11010 3Y SMD
    Text: REVISIONS LTR A DATE YR-MO-DA DESCRIPTION APPROVED 1989 AUG 11 Add device type 02. Add vendor CAGE 01295 for device type 02, cases E, F, and 2. Technical changes in 1.4 and table I. Change drawing CAGE code to 67268. Editorial changes through­ out. CURRENT CAGE CODE 67268


    OCR Scan     		PDF F0/75002BDX 5962-87610012X 54AC10LMQB M38510/75002B2X 5962-8761002EX SNJ54AC11010J 5962-8761002FX SNJ54AC11010W 5962-87610022X SNJ54AC11010FK 54900 54AC10 54AC11010 3Y SMD