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    54HC597 Search Results

    54HC597 Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    CD54HC597F3A Texas Instruments High Speed CMOS Logic 8-Bit Shift Register with Input Storage 16-CDIP -55 to 125 Visit Texas Instruments Buy
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    54HC597 Price and Stock

    Texas Instruments CD54HC597F3A

    HIGH SPEED CMOS LOGIC 8-BIT SHIF
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    54HC597 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    5962L0053605VYC

    Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
    Text: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A


    Original     		PDF MIL-HDBK-103AJ MIL-HDBK-103AH MIL-HDBK-103AJ 5962L0053605VYC 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA

    74HC597

    Abstract: t1is M54HC597 M54HC597F1 M74HC597 M74HC597B1R M74HC597C1R M74HC597M1R TL 924 7213-37
    Text: S G S -T H O M S O N Mû^ smi(mr[iMO(gS M 54HC597 M 74H C 597 8 BIT LATCH/SHIFT REGISTER • HIGHSPEED fMAX = 60 MHz (TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 4 |iA (MAX.) AT T a = 25 "C . HIGH NOISE IMMUNITY Vnih = V n il = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF M54HC597 M74HC597 54/74LS597 M54HC597F1 M74HC597M1R M74HC597B1R M74HC597C1R M54/74HC597 M54/M74HC597 7CI2CI237 74HC597 t1is M54HC597 M74HC597 M74HC597C1R M74HC597M1R TL 924 7213-37

    SCK 108

    Abstract: 54HC 74HC M54HC597 M74HC597 74HC597
    Text: I 7 / SCS-THOMSON M 54HC597 M 74HC597 i[Li STnfii IRDD i> 8-BIT LATCH/SHIFT REGISTER • LOW POWER DISSIPATION lcc = 4 (MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V nih = V nil = 28°/o Vcc (Min.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE


    OCR Scan     		PDF M54HC597 M74HC597 54/74LS597 M54/74HC597 16-pin M54/74HC597 SCK 108 54HC 74HC M74HC597 74HC597

    Untitled

    Abstract: No abstract text available
    Text: S G S -T H O M S O N M M[EÜ(0ra(2 «S M 54HC597 M74HC597 8 BIT LATCH/SHIFT REGISTER • HIGHSPEED fMAX = 60 MHz (TYP.) AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 4 nA (MAX.) AT Ta = 25 "C . HIGH NOISE IMMUNITY Vnih = Vnil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY


    OCR Scan     		PDF 54HC597 M74HC597 54/74LS597 M54HC597F1 74HC597M 74HC597B1R 74HC597C1R M54/74HC575 74HC597

    Untitled

    Abstract: No abstract text available
    Text: REVISIONS LTR DATE YR-MO-DA DESCRIPTION A Add vendor CAGE 27014 for device type 01EX and device type 012X. B Delete vendor CAGE 04713 and CAGE 27014. Add vendor CAGE 34371. Inactivate case outline 2 for new design. Change drawing CAGE code to 67268. Editorial changes throughout.


    OCR Scan     		PDF MIL-BUL-103. MIL-BUL-103 1990-750-527R