54ACT11010
Abstract: 74ACT11010 D2957
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
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Original
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PDF
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54ACT11010,
74ACT11010
SCAS018A
D2957,
500-mA
300-mil
54ACT11010
54ACT11010
74ACT11010
D2957
|
Untitled
Abstract: No abstract text available
Text: 54ACT11010, 74ACT11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ą ą SCAS018A − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • 54ACT11010 . . . J PACKAGE 74ACT11010 . . . D OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize
|
Original
|
PDF
|
54ACT11010,
74ACT11010
SCAS018A
D2957,
54ACT11010
500-mA
300-mil
|
54ACT11010
Abstract: 74ACT11010 D2957
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A – D2957, JULY 1987 – REVISED APRIL 1993 • • • • Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
|
Original
|
PDF
|
54ACT11010,
74ACT11010
SCAS018A
D2957,
500-mA
300-mil
54ACT11010
54ACT11010
74ACT11010
D2957
|
54ACT11010
Abstract: 74ACT11010 D2957
Text: 54ACT11010, 74ACT11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ą ą SCAS018A − D2957, JULY 1987 − REVISED APRIL 1993 • • • • • • 54ACT11010 . . . J PACKAGE 74ACT11010 . . . D OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize
|
Original
|
PDF
|
54ACT11010,
74ACT11010
SCAS018A
D2957,
54ACT11010
500-mA
300-mil
54ACT11010
74ACT11010
D2957
|
Untitled
Abstract: No abstract text available
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A- 02957, JULY 1987 - REVISED APRIL 1993 54ACT11010. . . J PACKAGE 74ACT11010. . . 0 OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-Pin V^c and GND Configurations
|
OCR Scan
|
PDF
|
54ACT11010,
74ACT11010
SCAS018A-
500-mA
300-mil
54ACT11010
|
Untitled
Abstract: No abstract text available
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A —D2957, JULY 1 9 8 7 -R E V IS E D A P R IL 1 9 9 3 54ACT11010. . . J PACKAGE 74ACT11010. . . D OR N PACKAGE * Inputs Are TTL-Voltage Compatible * Flow-Through Architecture to Optimize PCB Layout
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OCR Scan
|
PDF
|
54ACT11010,
74ACT11010
SCAS018A
D2957,
54ACT11010.
74ACT11010.
500-mA
300-mil
|
Untitled
Abstract: No abstract text available
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES T0049— 2957, JU LY 1967— REVISED MARCH 1990 54ACT11010 . . . J PACKAGE 74ACT11010 . . . O OR N PACKAGE • Inputs are TTL-Voltage Compatible • Flow-Through Architecture to Optimize PCB Layout
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OCR Scan
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PDF
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54ACT11010,
74ACT11010
T0049--
500-mA
300-mll
54ACT11010
|
54ACT11010
Abstract: 74ACT11010
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES T0049— 2957, JULY 1987— REVISED MARCH 1990 • Inputs are TTL-Voltage Compatible 5 4A C T 11 0 10 . . . J P A C K A G E 74A C T11010 . . . D OR N PACKAGE Flow-Through Architecture to Optimize PCB
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OCR Scan
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PDF
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54ACT11010,
74ACT11010
T0049â
500-mA
300-mil
54ACT11010
74ACT11010
|
54ACT11010
Abstract: 74ACT11010 D2957
Text: 54ACT11010, 74ACT11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS018A- D2957, JULY 1987 - REVISED APRIL 1993 54ACT11010 . . . J PACKAGE 74ACT11010 . . . D OR N PACKAGE Inputs Are TTL-Voltage Compatible Flow-Through Architecture to Optimize PCB Layout Center-PIn Vcc and GND Configurations
|
OCR Scan
|
PDF
|
54ACT11010,
74ACT11010
SCAS018A-
D2957,
500-mA
300-mil
54act11010.
74act11010
00cl42bIÃ
54ACT11010
D2957
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