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Abstract: No abstract text available
Text: REV22 MITSUBISHI LSIs 4V16169RT-10,-12,-15 16M C D R A M :16M (1024K -W Q R D BY 16-BIT) CACHED DRAM W ITH 16K (1024-W Q RD BY 16-BIT) SRAM DESCRIPTION The M 5M 4V16169R T is a 16M-bit Cached DRAM which integrates input registers, a 1,048,576-word by 16-bit dynamic memory array and a 1024
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REV22)
M5M4V16169RT-10
1024K
16-BIT)
024-W
4V16169R
16M-bit
576-word
16-bit
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Untitled
Abstract: No abstract text available
Text: MITSUBISHI LS Is TARGET SPEC REV. 2.0 4V16169RT-10,-12,-15 16MCDRAM:16M(1024K-WQRD BY 16-BIT) CACHED DRAM WITH 16K (1024-WQRD BY 16-BIT) SRAM P relim in ary This document is a preliminary Target Spec, and some of the contents are subject to change without notice.
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M5M4V16169RT-10
16MCDRAM
1024K-WQRD
16-BIT)
1024-WQRD
16169TP
576-w
16-bit
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