Hitachi DSA00164
Abstract: No abstract text available
Text: 4265C Series 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory ADE-203-309A Z Rev. 1.0 Jul. 21, 1995 Description The Hitachi HM51(S)4265C is a CMOS dynamic RAM organized 262,144-word × 16-bit. HM51(S)4265C has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process
|
Original
|
PDF
|
HM514265C
HM51S4265C
144-word
16-bit
ADE-203-309A
4265C
16-bit.
4265C
Hitachi DSA00164
|
Hitachi DSA00776
Abstract: HM51 HM514265C HM514265CJ-6 HM514265CLJ7
Text: 4265C Series 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory ADE-203-309A Z Rev. 1.0 Jul. 21, 1995 Description The Hitachi HM51(S)4265C is a CMOS dynamic RAM organized 262,144-word × 16-bit. HM51(S)4265C has realized higher density, higher performance and various functions by employing 0.8
|
Original
|
PDF
|
HM514265C
HM51S4265C
144-word
16-bit
ADE-203-309A
4265C
16-bit.
4265C
Hitachi DSA00776
HM51
HM514265CJ-6
HM514265CLJ7
|
HM51
Abstract: HM514265C HM514265CJ-6 Hitachi DSA0015
Text: 4265C Series 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory ADE-203-309A Z Rev. 1.0 Jul. 21, 1995 Description The Hitachi HM51(S)4265C is a CMOS dynamic RAM organized 262,144-word × 16-bit. HM51(S)4265C has realized higher density, higher performance and various functions by employing 0.8
|
Original
|
PDF
|
HM514265C
HM51S4265C
144-word
16-bit
ADE-203-309A
4265C
16-bit.
4265C
HM51
HM514265CJ-6
Hitachi DSA0015
|
HM51
Abstract: HM514265C HM514265CJ-6
Text: 4265C Series 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory ADE-203-309A Z Rev. 1.0 Jul. 21, 1995 Description The Hitachi HM51(S)4265C is a CMOS dynamic RAM organized 262,144-word × 16-bit. HM51(S)4265C has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process
|
Original
|
PDF
|
HM514265C
HM51S4265C
144-word
16-bit
ADE-203-309A
4265C
16-bit.
4265C
HM51
HM514265CJ-6
|
VG264265
Abstract: 4265CJ
Text: VG26 V 4265CJ 262,144 x 16 - Bit CMOS Dynamic RAM VIS Description The device is CMOS Dynamic RAM organized as 262,144 words x 16 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design
|
Original
|
PDF
|
4265CJ
40-pin
25/28/30/35/40ns
40/50/60ns
1G5-0118
VG264265
|
AT17LV
Abstract: AT17LV010-10DP AT17LV010-10DP-E AT17LV010-10DP-MQ AT17LV010-10DP-SV AT40K AT40KEL 4265C
Text: Features • EE Programmable 1,048,576 x 1-bit Serial Memory Designed to Store Configuration • • • • • • • • • • • • Programs for Field Programmable Gate Arrays FPGAs Very Low-power CMOS EEPROM Process In-System Programmable (ISP) via Two-Wire Bus
|
Original
|
PDF
|
AT40K
4265C
AT17LV
AT17LV010-10DP
AT17LV010-10DP-E
AT17LV010-10DP-MQ
AT17LV010-10DP-SV
AT40KEL
|
LTC4265
Abstract: "Power over Ethernet"
Text: QUICK START GUIDE FOR DEM ON STRATION CIRCUIT 1 4 1 5A IEEE8 0 2 .3 AT P OW ER-OV ER-ETH ERN ET P OW ERED DEV ICE CON TROL L ER L TC4 2 6 5 D E S C R IP T IO N Demonstration circuit DC1415A features the LTC 4265CEDE, a third-generation Powered Device PD controller for Power over Ethernet (PoE) applications.
|
Original
|
PDF
|
DC1415A
4265CEDE,
LTC4265
12pin
"Power over Ethernet"
|
m514265
Abstract: No abstract text available
Text: 4265C Series 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-309A Z Rev. 1.0 Jul. 21, 1995 Description The Hitachi HM51(S)4265C is a CMOS dynamic RAM organized 262,144-word x 16-bit. HM51(S)4265C has realized higher density, higher performance and various functions by employing 0.8 Jim CMOS process
|
OCR Scan
|
PDF
|
HM514265C
HM51S4265C
144-word
16-bit
ADE-203-309A
4265C
16-bit.
m514265
|
Untitled
Abstract: No abstract text available
Text: VIS ? VG26 V 4265CJ 2 6 2 ,1 4 4 x 1 6 -B it CMOS Dynamic RAM Description T h e d e v ic e is C M O S D y n a m ic R AM o rg a n iz e d a s 2 6 2 ,1 4 4 w o rd s x 16 b its w ith e x te n d e d d a ta o u t a c c e s s m o d e . It is fa b ric a te d w ith an a d v a n c e d s u b m ic ro n C M O S te c h n o lo g y an d a d v a n c e d C M O S c irc u it d e s ig n
|
OCR Scan
|
PDF
|
4265CJ
400mil,
40-pin
G5-0118
|
HM514265CLJ7
Abstract: TB125
Text: 4265C Series 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-309A Z Rev. 1.0 Jul. 21, 1995 Description The Hitachi HM51(S)4265C is a CMOS dynamic RAM organized 2 6 2 ,144-word x 16-bit. HM51(S)4265C has realized higher density, higher performance and various functions by employing 0.8
|
OCR Scan
|
PDF
|
HM514265C
HM51S4265C
144-word
16-bit
ADE-203-309A
4265C
16-bit.
HM514265CLJ7
TB125
|
Untitled
Abstract: No abstract text available
Text: VIS VG26 V 4265CJ 2 6 2 ,1 4 4 x 1 6 -B it CMOS Dynamic RAM Description The device is CMOS Dynamic RAM organized as 262,144 words x 16 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design
|
OCR Scan
|
PDF
|
4265CJ
40-pin
25/28/30/35/40ns
40/50/60ns
refV4265CJ
4265CJ
400mil,
G5-0118
age28
|
VG264265
Abstract: ut501 144XL
Text: VG26 V 4265CJ 262,144x16-B it CMOS Dynamic RAM Description The device is CMOS Dynamic RAM organized as 262,144 words x 16 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design
|
OCR Scan
|
PDF
|
4265CJ
144x16-B
40-pin
25/28/30/35/40ns
40/50/60ns
1G5-0118
VG264265
ut501
144XL
|
27C256AG
Abstract: 671400H 4265C 514270 101AG BK 4367 4165A 5118160 4270-D 4096A
Text: Line Up o f Hitachi IC M emories Classification Total bit 4M - SRAM- 3 .3 V r — 1M- Voltage Organization word X bit Type 512kx8- 5V - 512k x 8 - n H M 62W 8512A Series 121 H M 628512A Series - 133 H M 628512 S e r ie s . 145 — 1M x4- H M 674100H Series
|
OCR Scan
|
PDF
|
512kx8512k
28512A
674100H
671400H
8128B
1664H
9127H
8127H
27C256AG
4265C
514270
101AG
BK 4367
4165A
5118160
4270-D
4096A
|
Untitled
Abstract: No abstract text available
Text: MITSUBISHI LSIs Rev. 3.3 4265CJ,TP -5,-6,-7,-5S.-6S,-7S EDO HYPER PAGE MODE 4194304-BIT ( 262144-WORD BY 16-BIT ) DYNAMIC RAM DESCRIPTION PIN CONFIGURATION ( TOP VIEW ) T his is a fam ily o f 262144-w ord by 16-bit dynam ic RA M s with EDO mode function,fabricated with the high perform ance CM OS process, and
|
OCR Scan
|
PDF
|
M5M4V4265CJ
4194304-BIT
262144-WORD
16-BIT
262144-w
16-bit
03Q3r
40P0K
J40-P-400-1
40pin
|
|
51w4265
Abstract: No abstract text available
Text: 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-477A Z Rev. 1.0 Jul. 31, 1996 Description The Hitachi 4265C Series is a CMOS dynamic RAM organized as 262,144-word x 16-bit. 4265C Series has realized higher density, higher performance and various functions by employing
|
OCR Scan
|
PDF
|
HM51W4265C
144-word
16-bit
ADE-203-477A
16-bit.
51w4265
|
Untitled
Abstract: No abstract text available
Text: 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-477A Z Rev. 1.0 Jul. 31, 1996 Description The Hitachi 4265C Series is a CMOS dynamic R AM organized as 262,144-word x 16-bit. H M 5 4265C Series has realized higher density, higher performance and various functions by employing
|
OCR Scan
|
PDF
|
HM51W4265C
144-word
16-bit
ADE-203-477A
16-bit.
1W4265C
|
Untitled
Abstract: No abstract text available
Text: 4265C Series 262,144-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-477A Z Rev. 1.0 Jul. 31, 1996 Description The Hitachi 4265C Series is a CMOS dynamic RAM organized as 262,144-word x 16-bit. 4265C Series has realized higher density, higher performance and various functions by employing
|
OCR Scan
|
PDF
|
HM51W4265C
144-word
16-bit
ADE-203-477A
16-bit.
|