hc280
Abstract: DL129 LS180 LS280 MC74HC280 MC74HCXXXD MC74HCXXXN
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC74HC280 9-Bit Odd/Even Parity Generator/Checker High–Performance Silicon–Gate CMOS The MC74HC280 is identical in pinout to the LS280. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are
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MC74HC280
MC74HC280
LS280.
HC280
LS180
HC280
MC74HC280/D*
MC74HC280/D
DL129
LS280
MC74HCXXXD
MC74HCXXXN
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1505C
Abstract: 74ABT899 4 bit even parity generator circuit
Text: INTEGRATED CIRCUITS 74ABT899 9-bit dual latch transceiver with 8-bit parity generator/checker 3-State Product specification Supersedes data of 1993 Oct 04 IC23 Data Handbook Philips Semiconductors 1998 Jan 16 Philips Semiconductors Product specification
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74ABT899
74ABT899
1505C
4 bit even parity generator circuit
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Untitled
Abstract: No abstract text available
Text: INTEGRATED CIRCUITS 74ABT16899 74ABTH16899 18-bit latched transceiver with 16-bit parity generator/checker 3-State Product specification Supersedes data of 1997 Mar 28 IC23 Data Handbook Philips Semiconductors 1998 Feb 25 Philips Semiconductors Product specification
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74ABT16899
74ABTH16899
18-bit
16-bit
74ABTH16899
74ABT/H16899
01-Mar-98)
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application of parity checker
Abstract: 1505C 74ABT16899 74ABTH16899
Text: INTEGRATED CIRCUITS 74ABT16899 74ABTH16899 18-bit latched transceiver with 16-bit parity generator/checker 3-State Product specification Supersedes data of 1997 Mar 28 IC23 Data Handbook Philips Semiconductors 1998 Feb 25 Philips Semiconductors Product specification
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74ABT16899
74ABTH16899
18-bit
16-bit
74ABT/H16899
application of parity checker
1505C
74ABT16899
74ABTH16899
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74ALVT16899
Abstract: SSOP56 16-bit latch
Text: INTEGRATED CIRCUITS 74ALVT16899 2.5V/3.3V 16-bit latch transceiver with 8-bit parity generator/checker 3-State Product specification IC23 Data Handbook Philips Semiconductors 1998 Jun 30 Philips Semiconductors Product specification 2.5V/3.3V 16-bit latch transceiver with
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74ALVT16899
16-bit
74ALVT16899
SSOP56
16-bit latch
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74ALVT16899
Abstract: diode 1a4
Text: INTEGRATED CIRCUITS 74ALVT16899 2.5V/3.3V 18-bit latched transceiver with 16-bit parity generator/checker 3-State Product specification IC23 Data Handbook Philips Semiconductors 1998 Jun 30 Philips Semiconductors Product specification 2.5V/3.3V 18-bit latched transceiver with
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74ALVT16899
18-bit
16-bit
74ALVT16899
diode 1a4
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HCF40101B
Abstract: HCF40101BEY HCF40101BM1 HCF40101M013TR
Text: HCF40101B 9 BIT PARITY GENERATOR CHECKER • ■ ■ ■ ■ ■ STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA MAX AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT
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HCF40101B
100nA
JESD13B
HCF40101B
HCF40101BEY
HCF40101BM1
HCF40101M013TR
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Untitled
Abstract: No abstract text available
Text: GD54/74HC280, GD54/74HCT280 9-BIT EVEN/ODD PARITY GENERATOR/CHECKER General Description These devices are identical in pinout to the 5 4 /7 4 L S 2 8 0 . They contain 9-bit inputs and 2 out puts even and odd parities to facilitate operation of Pin Configuration
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GD54/74HC280,
GD54/74HCT280
GD74HCT280
GD54HCT280
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PDF
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Untitled
Abstract: No abstract text available
Text: HITACHI/ L O G IC/ AR RA YS /M EN ^5 74 HC180 HD D Ë | 4 4 ^ 5 0 3 001 0425 O 92D 1 0 4 2 5 # 8-bit O dd/Even Parity G enerator/C hecker This universal, monolithic, 9-bit 8 data bits plus 1 parity bit parity generator/checker features odd/even outputs and
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HC180
0D1D315
T-90-20
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74180
Abstract: 74180 parity generator 4 bit even and odd parity checker 74180 parity 74180 bit 93180 8284 pin diagram 8284 ScansUX987
Text: TTL/MSI 93180/54180. 74180 8-BIT PARITY GENERATOR/CHECKER D E S C R IP T IO N — T h e 9 3 1 8 0 /5 4 1 8 0 or 7 4 1 8 0 are m ono lith ic, 8 -B it Parity Check/Generators which L O G IC S Y M B O L , feature control inputs and even/odd outputs to enhance operation in either odd or even parity
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The93180/54180or
74180
74180 parity generator
4 bit even and odd parity checker
74180 parity
74180 bit
93180
8284 pin diagram
8284
ScansUX987
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PDF
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CD40101B
Abstract: 15-V
Text: CD40101B Types Features: CMOS 9-Bit Parity Generator/Checker High-Voltage T y p e s 2 0 -V olt Rating T h e R C A -C D 4 01 0 1B is a 9-bit (8 data bits plus 1 parity bit) p arity generator/checker. It may be used to detect errors in data trans mission or data retrieval. Odd and even
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CD40101B
20-Volt
RCA-CD40101B
CD40101B
15-V
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TT 2246
Abstract: 74hc180 ge c180 SN74HC180
Text: SN54HC180, SN74HC180 9 BIT ODDIEVEN PARITY GENERATORS/CHECKERS D2484, MARCH 1 98 4 -REVISED SEPTEMBER 1987 TOP VIEW g C U C 2 FV EN C 3 Dependable Texas Instruments Quality and Reliability h ODD C 4 description E EVEN C 5 - These universal, m o n o lith ic , 9 -b it (8 data bits
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SN54HC180,
SN74HC180
D2484,
300-mil
SN54HC180
TT 2246
74hc180
ge c180
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54HC180, SN74HC180 9-BIT ODD/EVEN PARITY GENERATORSfCHECKERS D 2 4 8 4 , M A R C H 1 9 8 4 -R E V IS E D SEPTEMBER 1 9 8 7 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 5 4 H C 1 8 0 . . . J PACKAGE
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SN54HC180,
SN74HC180
300-mil
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PDF
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Untitled
Abstract: No abstract text available
Text: Technical Data _ CD54/74AC280 CD54/74ACT280 9-Bit Odd/Even Parity Generator/Checker V cc"4 Type Features: • B uffered inputs u Typical propagation delay: 10 ns @ V Cc = 5 V, T, = 25°C, CL = 50 pF GND- 7 FUNCTIONAL DIAGRAM The RCA CD54/74AC280 and CD54/74ACT280 9 -b it o d d /
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CD54/74AC280
CD54/74ACT280
CD54/74AC280
CD54/74ACT280
CD54/74AC
CD54/74ACT
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bc3n
Abstract: 011 92121
Text: DEVICE SPECIFICATION 36-BIT ODD/EVEN PARITY GENER ATO R AND CHECKER Features: S4280 Description: • 10.4ns Propagation Delay commercial, worst case • Generates both Odd and Even Parity • Checks for both Odd and Even Parity • Configured as four Independent 9-bit Parity
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36-BIT
S4280
32-Bit
S4280
bc3n
011 92121
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PDF
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EP01
Abstract: S4280 0P-02
Text: ^ DEVICE SPECIFICATION - lJ M K 36-BIT ODD/EVEN PARITY GENERATOR AND CHECKER Features: ' - S4280 Description: • 10.4ns Propagation Delay commercial, worst case • Generates both Odd and Even Parity • Checks for both Odd and Even Parity
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36-BIT
S4280
32-Bit
S4280
EP01
0P-02
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PDF
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Untitled
Abstract: No abstract text available
Text: P54/74FCT3480C/D—P54/74FCT3481 C/D 3.3V DUAL ODD-PARITY, DUAL EVEN-PARITY GENERATOR/CHECKERS 7$- FEATURES • Function and Drive Compatible with the Fastest TTL Logic ESD protection exceeds 2000V
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P54/74FCT3480C/Dâ
P54/74FCT3481
MIL-STD-883,
AE1745-2
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480B
Abstract: 16 bit odd even parity checker using two IC
Text: P54/74PCT480/A/B, P54/74PCT481 /A/B DUAL ODD-PARITY, DUAL EVEN-PARITY GENERATOR/CHECKERS FEATURES • Two 8-Bit Parity Generator/Checkers Per Device CMOS For Low Power Dissipation ■ Three Speed Grades Mil/Comm’l Standard— 17/13 ns Fast— 9 .517.5 ns
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P54/74PCT480/A/B,
P54/74PCT481
24-Pln
P54/74PCT480/A/B
MIL-STD-883,
480B
16 bit odd even parity checker using two IC
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PDF
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Untitled
Abstract: No abstract text available
Text: P54/74PCT480/A/B, P54/74PCT481/A/B DUAL ODD-PARITY, DUAL EVEN-PARITY GENERATOR/CHECKERS raiynoBMW À -
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P54/74PCT480/A/B,
P54/74PCT481/A/B
24-Pln
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b5013
Abstract: No abstract text available
Text: NATIONAL SEP1ICOND {LOGIC} DEE D | bSOliee DObMEOÖ 1 | 62 T-Hsr-n CONNECTION DIAGRAM PINOUT A 93S62 9-INPUT PARITY CHECKER/GENERATOR io [ T jÜ ] V cc h [T T 5] I? 12 U Ï U 16 b [T TT 's le |T DESCRIPTION — The '62 is a very high speed 9-input parity checker/gen
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93S62
b5013
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Untitled
Abstract: No abstract text available
Text: 62 CO NNECTIO N DIAGRAM PINOUT A 93S62 9-INPUT PARITY CHECKER/GENERATOR DESCRIPTION — The '62 is a very high speed 9-input parity checker/generator for use in error detection and error correction applications. The '62 provides odd and even parity for up to nine data bits. The even parity
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93S62
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74als280
Abstract: 54ALS280 als 280
Text: SN54ALS280, SN54AS280, S N 74A LS 28 0 . SN74AS280 9-BIT PARITY GENERATORS/CHECKERS D 2 6 6 1 . D E C E M B E R 1 9 8 2 -R E V IS E D A U G U ST 1985 Generates Either Odd or Even Parity for Nine Data Lines SN 54A LS 280, S N 54A S 280 S N 74A LS 280, S N 74A S 280 . .
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SN54ALS280,
SN54AS280,
SN74AS280
25-LIN
25-line
27-line
LS280/
74als280
54ALS280
als 280
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Untitled
Abstract: No abstract text available
Text: •*» • «s P54/74FCT480T/AT/BT — P54/74FCT481T/AT/BT DUAL ODD-PARITY, DUAL EVEN-PARITY GENERATOR/CHECKERS FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ FCT-A speed at 7.5ns max. Com'l FCT-B speed at 5.6ns max. (Com'l)
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P54/74FCT480T/AT/BT
P54/74FCT481T/AT/BT
480AT,
480BT,
481BT
MIL-STD-883,
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Untitled
Abstract: No abstract text available
Text: P54/74FCT480/A/B P54/74PCT480/A/B P54/74FCT481 /A/B (P54/74PCT481 /A/B) DUAL ODD-PARITY, DUAL EVEN-PARITY QENERATOR/CHECKERS_ FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic 64 mA Sink Current (Com’l), 32 mA (Mil)
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P54/74FCT480/A/B
P54/74PCT480/A/B)
P54/74FCT481
P54/74PCT481
FCT480
MIL-STD-883,
AE15S1-3fl&
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