SMD marking code ax2
Abstract: HYB 39S64800AT-8 P-TSOPII-54 39S64800AT-8 39S64160AT-8
Text: HYB39S6440x/80x/16xAT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM Preliminary Information • High Performance: -8 -10 Units fCK max. 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns tCK2 10 12 ns tAC2 6 8 ns • Single Pulsed RAS Interface • Fully Synchronous to Positive Clock Edge
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HYB39S6440x/80x/16xAT
64MBit
P-TSOPII-54
400mil
SMD marking code ax2
HYB 39S64800AT-8
39S64800AT-8
39S64160AT-8
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PDF
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KM48S8030BT-GL
Abstract: nn5264805tt-b60 KM48S2020CT-GL 0364804CT3B-260 d4564163g5 nt56v1680a0t D4564841g5 81F641642B-103FN M5M4V16S30DTP Siemens 9832
Text: PC100 SDRAM Component Testing Summary As part of Intel’s enabling process, the following test/characterization procedure has been implemented on PC100 SDRAM components. A small sample of components 2-5 devices have been tested under the conditions described in Table 2.
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Original
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PC100
KM48S8030BT-GL
nn5264805tt-b60
KM48S2020CT-GL
0364804CT3B-260
d4564163g5
nt56v1680a0t
D4564841g5
81F641642B-103FN
M5M4V16S30DTP
Siemens 9832
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PDF
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P-TSOPII-54
Abstract: 39s64160at-8
Text: HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns tCK2 10 12 15 ns tAC2 6 7 8 ns • Fully Synchronous to Positive Clock Edge • 0 to 70 °C operating temperature
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HYB39S64400/800/160AT
64MBit
P-TSOPII-54
400mil
PC100
39s64160at-8
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PDF
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KM416S4030BT-G10
Abstract: KM48S2020CT-GL 81F641642B-103FN d4564163g5 S9745-M06 M5M4V16S30DTP gm72v661641ct7j D4564163G5-A10-9JF D4516821AG5 D4516821
Text: PC100 SDRAM Component Testing Summary As part of Intel’s enabling process, the following test/characterization procedure has been implemented on PC100 SDRAM components. A small sample of components 2-5 devices have been tested under the conditions described in Table 2.
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Original
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PC100
KM416S4030BT-G10
KM48S2020CT-GL
81F641642B-103FN
d4564163g5
S9745-M06
M5M4V16S30DTP
gm72v661641ct7j
D4564163G5-A10-9JF
D4516821AG5
D4516821
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PDF
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KM48S8030BT-GL
Abstract: NT56V1680A0T D4516821AG5 KM416S4030BT-GL 81f641642b103fn KM48S2020CT-GL D4516821AG5-A107JF gm72v661641ct7j TC59S6408BFT80 D4564163G5
Text: PC100 SDRAM Component Testing Summary As part of Intel’s enabling process, the following test/characterization procedure has been implemented on PC100 SDRAM components. A small sample of components 2-5 devices have been tested under the conditions described in Table 2.
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Original
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PC100
KM48S8030BT-GL
NT56V1680A0T
D4516821AG5
KM416S4030BT-GL
81f641642b103fn
KM48S2020CT-GL
D4516821AG5-A107JF
gm72v661641ct7j
TC59S6408BFT80
D4564163G5
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PDF
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Untitled
Abstract: No abstract text available
Text: SIEMENS HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: Multiple Burst Operation -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns Automatic Command and Read with Single Write Controlled
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OCR Scan
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HYB39S64400/800/160AT
64MBit
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PDF
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Untitled
Abstract: No abstract text available
Text: SIEMENS HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: Multiple Burst Operation -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns tCK2 10 12 15 ns tAC2 6 7 8 ns Automatic Command and Read
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OCR Scan
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HYB39S64400/800/160AT
64MBit
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PDF
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TSOP54-2
Abstract: No abstract text available
Text: HYB39S6440x/80x/16xAT L 64M B it Synchronous DRAM SIEMENS 64 MBit Synchronous DRAM Advanced Inform ation • High Performance: -8 -10 Units fCKmax. 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns tCK2 10 12 ns tAC2 6 8 ns Multiple Burst Operation Automatic Command Programmable W rap Sequence: Sequential
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OCR Scan
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HYB39S6440x/80x/16xAT
P-TSOPII-54
400mil
64MBit
TSOP54-2
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PDF
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