PICMASTER
Abstract: floppy drive emulator INHX16 PICMASTER-17B PIC16C54 PIC16C54A PICMASTER-16G PIC16C56 PIC16C57 PIC16C61
Text: PICMASTER System Universal In-Circuit Emulator System with MPLAB IDE SYSTEM FEATURES General: • Complete Hi-Performance PC-based Microcontroller Development System for the PIC16/17 families. • For use on PC-compatible 386, 486 and Pentium machines under Microsoft Windows 3.X
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PIC16/17
DS30137I-page
PICMASTER
floppy drive emulator
INHX16
PICMASTER-17B
PIC16C54
PIC16C54A
PICMASTER-16G
PIC16C56
PIC16C57
PIC16C61
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HS488
Abstract: NAT4882 TNT4882C
Text: Combination GPIB Controller/Analyzer for ISA AT-GPIB/TNT+ Features AT-GPIB/TNT+ Processor PC AT ISA , Plug and Play ISA Intel 386 or higher, math coprocessor required Overview The AT-GPIB/TNT+ combines the functionality of the AT-GPIB/TNT (Plug and Play) IEEE 488.2 Controller
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16-bit
TNT4882C
24-pin
HS488
NAT4882
TNT4882C
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EDIT BIOS
Abstract: PC BIOS extension intel386 award Flash BIOS IBM386
Text: BIOS AWARD SOFTWARE INTERNATIONAL, INC. Award BIOS • ■ ■ ■ ■ ■ ■ ■ ■ Supports Most Standard Chipsets BUS Support For ISA, EISA & PCI ATAPI CD-ROM Support Enhanced IDE Drive Support LBA Mode Transfers 3 Parallel/4 Serial Ports Compression Services
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Intel386TM
Intel486TM
64KB-128KB
Intel386
Intel486
EDIT BIOS
PC BIOS extension
award Flash BIOS
IBM386
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EISA Bus
Abstract: forerunner atm crc 10 in atm Scatter-Gather 486 processor types
Text: ATM FORE SYSTEMS ForeRunner ESA-200EPC EISA Bus ATM Adapter TECHNICAL SPECIFICATIONS Operating Systems • Windows NT 3.5 or 3.51 ■ Novell Netware 3.12 or 4.x Servers Only PC Types ■ Any Fully-Compliant Extended Industry Standard Architecture (EISA) Specification PC or Server
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ESA-200EPC
DX/33
DX/2-66
ESA-200EPC/125A
ESA-200EPC/OC3ST
ESA-200EPC/OC3SC
ESA-200EPC/UTP5
90-Day
w/RJ-45
EISA Bus
forerunner atm
crc 10 in atm
Scatter-Gather
486 processor types
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Untitled
Abstract: No abstract text available
Text: AHM85 Series GREEN POWER • Medical & IT Safety Approvals • Energy Star Level V • CEC 2008 & EISA 2007 Compliant • IP22 Environmental Rating • Compact Format 5.90” x 2.52” x 1.45” • <0.5 W Standby Power • 85 W • Class I & Class II Models
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AHM85
element14
16-April-13
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487SX
Abstract: OPTi-486WB v 1.1 82c681 opti 486 chipset
Text: i 199? OPTi-386/486WB EISA Chipset 82C681/82C682/82C686/82C687 EBC/MCC/1SP/DBC DATABOOK Preliminary Version 1.3 t OPTÏ-386/486WB EISA DATABOOK Version 1.3 PRELIMINARY Disclaimer This specification is subject to change without notice. OPTi, Incorporated assumes no
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OPTi-386/486WB
82C681/82C682/82C686/82C687
-386/486WB
EMSTR16#
-38G/486WB
160-Pin
QFP160-P-2828
487SX
OPTi-486WB v 1.1
82c681
opti 486 chipset
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POWER COMMAND HM 1300
Abstract: 82358
Text: inteT 82358 Pm ORM M SV 1.0 INTRODUCTION interface unit takes advantage of the 386 address pipelining capabilities for 386 systems. 1.1 EBC System Architecture Overview There is a special protocol using the host bus signal HSTRETCH#, which enables BCLK low time to be
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GT1 X02
Abstract: SiS chipset 486 82c681 ram 2112 SIS chipset for 486 opti 486 chipset 82C631 80487SX HD3112 sd338
Text: i »9? OPTÎ-386/486WB EISA Chipset 82C681/82C682/82C686/82C687 EBC/MCC/ISP/DBC D A T A B O O K Preliminary Version 1.3 / Powered by ICminer.com Electronic-Library Service CopyRight 2003 OPTÏ-386/486WB EISA DATABOOK PRELIMINARY Version 1.3 Disclaimer This specification is subject to change without notice. OPTi, Incorporated assumes no
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OPTi-386/486WB
82C681/82C682/82C686/82C687
-386/486WB
160-Pin
QFP160-P-2828
8M888888888Â
888883ll888B88888Â
GT1 X02
SiS chipset 486
82c681
ram 2112
SIS chipset for 486
opti 486 chipset
82C631
80487SX
HD3112
sd338
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GIGABYTE G41
Abstract: 82360SL intel 82360SL
Text: INTEL CORP UP/PRPHLS 3IE D 402tl7S 00aSbb7 2 int@l 7 = V f-/7 -^ 2 386TM SL MICROPROCESSOR SuperSet Highly-Integrated Static 386 Microprocessor Complete ISA Peripheral Subsystem System-Wide Power Management Static 386™ CPU Core — Runs MS-DOS*, WINDOWS*, O S/2*
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402tl7S
00aSbb7
386TM
386TM
10-2c.
82360SL
196-Leadâ
Ebl75
0125x0
GIGABYTE G41
intel 82360SL
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80487
Abstract: 80487SX 486 system bus weitek pin diagram of 80487 symphony chipset 386DX motherboard CACHE MEMORY FOR 80386DX 80387 dram controller
Text: SL82C470 SYMPHONY LABORATORIES 3EC 1 3 991 SL82C470 486/386 EISA CHIPSET SL82C471 Cache/DRAM Controller SL82C472 EISA Bus Controller SL82C473 DMA Controller 100% EISA com patible * Supports both conventional and concurrent configurations 20/25/33/50 M Hz 80486 DX/SX CPU operation
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SL82C470
SL82C470
SL82C471
SL82C472
SL82C473
80386DX
256MB
SL82C473.
80487
80487SX
486 system bus
weitek
pin diagram of 80487
symphony chipset
386DX motherboard
CACHE MEMORY FOR 80386DX
80387
dram controller
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486sl
Abstract: 82078
Text: 82078 44 PIN 8.0 COMPATIBILITY 8.2 Drive Polling The 82078 was designed with software compatibility in mind. It is a fully backwards compatible solution with the older generation 8272A and NEC765A/B disk controllers. It is fully compatible with Intel’s 386/486SL Microprocessor Superset.
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NEC765A/B
386/486SL
486sl
82078
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HC SR04
Abstract: lcm-5331-22ntk toshiba Notebook lcd inverter schematic schematic LG TV lcd backlight inverter NEC plasma tv schematic diagram lcd power board schematic lg yp LCM-5327-24NAK mod 8 using jk flipflop NEC J330 lcd backlight inverter schema
Text: Introduction 65535 High Performance Flat Panel / CRT VGA Controller • Highly Integrated Design Flat Panel/CRT Controller, RAMDAC, Clock Synthesizer, non multiplexed bus, direct panel drive ■ Integrated Interface for Multiple Bus Architec tures • Local Bus (32-bit 386/486 or 16-bit 386SX)
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32-bit
16-bit
386SX)
256Kx
512KB)
256Kxl6
256Kx4
160-Pin
HC SR04
lcm-5331-22ntk
toshiba Notebook lcd inverter schematic
schematic LG TV lcd backlight inverter
NEC plasma tv schematic diagram
lcd power board schematic lg yp
LCM-5327-24NAK
mod 8 using jk flipflop
NEC J330
lcd backlight inverter schema
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toshiba lcd inverter pinout
Abstract: lm- ch 53 -22ntk NEC plasma tv schematic diagram LM-CK53-22NEZ LM64C031 NEC J330 LCM-5327-24NAK schematic diagram crt tv sharp LCD 640X200 OPTREX color tv pattern generator ep 485 schematic diagram
Text: Introduction 65535 High Performance Flat Panel / CRT VGA Controller • Highly Integrated Design Flat Panel/CRT Controller, RAMDAC, Clock Synthesizer, non multiplexed bus, direct panel drive ■ Integrated Interface for Multiple Bus Architec tures • Local Bus (32-bit 386/486 or 16-bit 386SX)
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32-bit
16-bit
386SX)
256KX16
512KB)
256Kxl6
256Kx4
160-Pin
toshiba lcd inverter pinout
lm- ch 53 -22ntk
NEC plasma tv schematic diagram
LM-CK53-22NEZ
LM64C031
NEC J330
LCM-5327-24NAK
schematic diagram crt tv sharp
LCD 640X200 OPTREX
color tv pattern generator ep 485 schematic diagram
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PICMASTER
Abstract: PICMASTER-16G E16-D INHX16 PIC16C54 PIC16C54A PIC16C55 PIC16C56 PIC16C57 PIC16C61
Text: $ M ic r o c h ip PICMASTER System PICMASTER Universal In-Circuit Emulator System SYSTEM FEATURES General: • Complete Hi-Performance PC-based Microcon troller Development System for the PIC16/17 families. • For Use on PC-compatible 386, and 486 machines under Microsoft® Windows 3 .X envi
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PIC16/17
PICMASTER-16D
PIC16C5X
EM167017
PICMASTER-16E
PIC16C64
EM167018
EM167019
PICMASTER
PICMASTER-16G
E16-D
INHX16
PIC16C54
PIC16C54A
PIC16C55
PIC16C56
PIC16C57
PIC16C61
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82385
Abstract: 82350DT 82359 82350 82358 intel 82350 intel 80386 bus architecture 82395 82358DT intel 82358
Text: in t e i 82358DT EISA BUS CONTROLLER Supports 8-, 16-, or 32-bit DMA Cycles — Type A, B, or C Burst Cycles — Compatible Cycles Supports 82350 and 82350DT Chip Set Based Systems — Mode Selectable for Either 82350 or 82350DT Based Systems — Mode Defaults to 82350 Based
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82358DT
32-bit
132-Pin
82350DT
Intel486,
82385
82359
82350
82358
intel 82350
intel 80386 bus architecture
82395
intel 82358
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intel 82350
Abstract: architecture of 80486 microprocessor EISA chip set isa bus master 386 intel 8742 intel 82357 intel 82352 82352 intel 82358
Text: 82350 will need to run four cycles to the 8-bit slave and route the bytes to appropriate byte lanes EISA TERMINOLOGY ISA BU S— The bus used in Industry Standard Archi tecture compatible computers. In the context of an E IS A system, it refers to the ISA subset of the E IS A
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16-bit
32-bit
intel 82350
architecture of 80486 microprocessor
EISA chip set
isa bus master 386
intel 8742
intel 82357
intel 82352
82352
intel 82358
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82358
Abstract: T27b T48D T39a M82358 T49B T36D T19e
Text: 82358 6.0 A.C. SPECIFICATIONS A.C. Specifications for the EISA Bus Controller EBC TcaSE = 0°C to + 70°C, VCC = 5V ± 5 % , T ambient = 0°C to + 5 5 ”C Symbol Parameter 25 MHz Min 33 MHz Max Min Units Notes Max Host Interface Signals t1 t ia t ib 11c
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90252-A
82358
T27b
T48D
T39a
M82358
T49B
T36D
T19e
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intel 82350
Abstract: intel 82352 82351 eisa intel 82357 intel 82358 82359 82350DT EISA Chip Set Design Guide 2LF 1418 82350DT
Text: in te i 82358DT EISA Bus Controller • Supports 82350 and 82350DT Chip Set Based Systems — Mode Selectable for Either 82350 or 82350DT Based Systems — Mode Defaults to 82350 Based Systems ■ Socket Compatible with the 82358 EISA Bus Controller ■ Provides EISA/ISA Bus Cycle
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82358DT
82350DT
lntel386
Intel486â
32-bit
RST385
intel 82350
intel 82352
82351 eisa
intel 82357
intel 82358
82359
82350DT EISA Chip Set Design Guide
2LF 1418
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led 7 segment LDS 5161 AK
Abstract: led 7 segment LDS 5161 AH 7-segment 4 digit LFD 5522 AKO 701 434 tdso 5160 k lds 7 segment LDS 5161 AK led 7 segment LDS 5161 As manual LG VARIABLE FREQUENCY DRIVE is3 -20/led 7 segment LDS 5161 AH ako 544 126
Text: NAM E; C O M P A N Y :. ADDRESS; . . C IT Y ; S TA TE: Z IP : C O U N T R Y :. P H O N E N O .; . .I — ;.-,. ' - V- ORDER NO. QTY. TITLE fTTT ±j . • . n i i lU . . II 11 1 i i 1111 1-T 2 .-.
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X011-6
178Erasm
X011-2712-803-8294
12thFloor,
15thFloor,
18479R
X23756S
led 7 segment LDS 5161 AK
led 7 segment LDS 5161 AH
7-segment 4 digit LFD 5522
AKO 701 434
tdso 5160 k
lds 7 segment LDS 5161 AK
led 7 segment LDS 5161 As
manual LG VARIABLE FREQUENCY DRIVE is3
-20/led 7 segment LDS 5161 AH
ako 544 126
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Untitled
Abstract: No abstract text available
Text: PIE5@ y T [p[^E¥00 in te l Military lntel386TM EX EMBEDDED MICROPROCESSOR • Static Intel386 CPU Core — Low Power Consumption — 5V ± 5% Operating Power Supply — 25 MHz Operating Frequency Large Uniform Address Space — 64 Megabyte Physical — 64 Terabyte Virtual
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lntel386TM
Intel386â
lntel387TM
32-bit
AP-469,
Intel486â
AP-498,
AP-499,
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Untitled
Abstract: No abstract text available
Text: H •r INI t l L - NEC Electronics Inc. ARC Chip Sot c/o MCT-ADR Address Path Controller and MCT-DP Data Path Controller July 1993 Description The ARC chip set operates in a high-performance computer system based on NEC’s VR4000-family of 64-bit RISC microprocessors VR4000 , VR4400™, and
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VR4000-family
64-bit
VR4000TM,
VR4400TM,
VR4200TM)
/L/PD31432)
/L/PD31431)
386TM-compatible
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arc risc
Abstract: Arc chip
Text: N E C ^ ELECTRONICS INC faIE D • ^457525 0Q3Sfa41 ST7 ■ NECE ARC Chip Set c/o MCT-ADR Address Path Controller and MCT-DP Data Path Controller IMEC NEC Electronics Inc. _ Description The ARC chip set operates in a high-performance
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0Q3Sfa41
64-bit
4000-family
128-bit
i386-compatible
32-bit
arc risc
Arc chip
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wd90c30
Abstract: WD90C31 vlsi 386sx WD7600 WD90C56 72A3 ad6v intel 486 dx 33mhz wd90c3 TLE 7233
Text: WESTERN D IG IT A L CORP i % 54E D r ' . • ■ T71ÖE2Ö G01SQÖE 23ß HlilDC ' 111 WD90C56 'T -S Z '-V b -H ' — Video Local Bus Interface — 1 ^ V LB l) Device BBBMW ■ H *— B ill— *■:■<■.■■'•'■■; ' : * ■■, ' . ■ > ■ ' . V
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G01SQ
WD90C56
wd90c30
WD90C31
vlsi 386sx
WD7600
WD90C56
72A3
ad6v
intel 486 dx 33mhz
wd90c3
TLE 7233
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AT9000
Abstract: No abstract text available
Text: P L X TECHNOLOGY CORP 3SE T> böSSlHT GGOaiSI T IPLX T-52-33-55 EISA 9000 t • e EISA Bus Master Interface Chip for High Performance Controllers Preliminary December!990 Features General Description The EISA 9000 is designed to provide the most compact, inexpensive and highest performance EISA bus master
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T-52-33-55
128-pin
AT9000
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