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    312PS Search Results

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    CC1312PSIPMOTR Texas Instruments Sub-1 GHz system-in-package (SIP) module with integrated power amplifier 48-QFM -40 to 105 Visit Texas Instruments
    SF Impression Pixel

    312PS Price and Stock

    Texas Instruments LP-EM-CC1312PSIP

    CC1312PSIP LAUNCHPAD DEVELOPMENT
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    DigiKey LP-EM-CC1312PSIP Box 1 1
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    Mouser Electronics LP-EM-CC1312PSIP 4
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    Zilog Inc Z86E4312PSC

    IC MCU 8BIT 4KB OTP 40DIP
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    Zilog Inc Z86E4312PSG

    IC MCU 8BIT 4KB OTP 40DIP
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    Zilog Inc Z8674312PSC

    IC MCU 8BIT 8KB OTP 40DIP
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    Texas Instruments CC1312PSIPMOTR

    IC RF TXRX+MCU 802.15.4 73QFM
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    312PS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 19-2078; Rev 0; 8/01 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ 30ps typ Part-to-Part Skew ♦ 12ps (typ) Output-to-Output Skew ♦ 312ps (typ) Propagation Delay


    Original     		PDF MAX9311/MAX9313 1-to-10 5x5x01 MAX9311/MAX9313

    Untitled

    Abstract: No abstract text available
    Text: 19-2078; Rev 0; 8/01 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features ♦ +2.25V to +3.8V Differential HSTL/LVPECL Operation ♦ -2.25V to -3.8V LVECL Operation ♦ 30ps typ Part-to-Part Skew ♦ 12ps (typ) Output-to-Output Skew ♦ 312ps (typ) Propagation Delay


    Original     		PDF MAX9311/MAX9313 1-to-10 5x5x01 MAX9311/MAX9313

    smd 100uf Cha

    Abstract: 5304 smd 8 pin ISPPAC-CLK5308S-01TN48I MBR120VLSFT1G RC0805JR-0710KL 100uF CHA ECS-3953M ic 5304 smd 8 pin SMD 100 6n cap DS1010
    Text: ispClock Family Handbook HB1006 Version 01.4, November 2009 ispClock Family Handbook Table of Contents November 2009 Handbook HB1006 Section I. ispClock Family Data Sheets ispClock5600A Family Data Sheet. 1-1


    Original     		PDF HB1006 HB1006 ispClock5600A ispClock5400D ispClock5300S AN6080 smd 100uf Cha 5304 smd 8 pin ISPPAC-CLK5308S-01TN48I MBR120VLSFT1G RC0805JR-0710KL 100uF CHA ECS-3953M ic 5304 smd 8 pin SMD 100 6n cap DS1010

    Untitled

    Abstract: No abstract text available
    Text: 19-2078; Rev 2; 10/02 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs.


    Original     		PDF MAX9311/MAX9313 1-to-10 21-0054F MAX9313EC MAX9313EGJ 21-0091I G3255-1*

    C654C

    Abstract: No abstract text available
    Text: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer May 2006 Data Sheet • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features ■ ■ ■ ■


    Original     		PDF 400MHz ispPAC-CLK5620AV-01T100C C654C

    MAX9311

    Abstract: MAX9311ECJ MAX9311EGJ MAX9311EHJ MAX9313 MAX9313ECJ MAX9313EGJ MC100EP111 MC100LVEP111
    Text: 19-2078; Rev 2; 10/02 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs.


    Original     		PDF MAX9311/MAX9313 1-to-10 MAX9311/MAX9313 MAX9311 MAX9311ECJ MAX9311EGJ MAX9311EHJ MAX9313 MAX9313ECJ MAX9313EGJ MC100EP111 MC100LVEP111

    Untitled

    Abstract: No abstract text available
    Text: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer December 2005 Preliminary Data Sheet • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features


    Original     		PDF 400MHz ispPAC-CLK5620AV-01T100C ispClock5620A: 100-pin

    ispClock5410D

    Abstract: UES23 DS1025 SSTL15 LVDS33 ispClock5406 ispCLOCK5406D SSTL-15 CLK5406
    Text: ispClock 5400D Family In-System Programmable, Ultra-Low Jitter Zero Delay and Fan-Out Buffer, Differential November 2009 Preliminary Data Sheet DS1025  Up to 10 Programmable Fan-out Buffers Features • Programmable differential output standards and


    Original     		PDF 5400D DS1025 ispClock5400D 1-800-LATTICE ispClock5410D UES23 DS1025 SSTL15 LVDS33 ispClock5406 ispCLOCK5406D SSTL-15 CLK5406

    ISPPAC-CLK5620AV-01TN100I

    Abstract: ISPPAC-CLK5620AV-01TN100C
    Text: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer March 2007 Data Sheet DS1019 • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features ■ ■


    Original     		PDF DS1019 400MHz ispClock5600A ISPPAC-CLK5620AV-01TN100I ISPPAC-CLK5620AV-01TN100C

    Untitled

    Abstract: No abstract text available
    Text: 19-2078; Rev 2; 10/02 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs.


    Original     		PDF MAX9311/MAX9313 1-to-10 MAX9311/MAX9313

    Untitled

    Abstract: No abstract text available
    Text: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended April 2006 Preliminary Data Sheet Features • Up to +/- 12ns skew range • Coarse and fine adjustment modes • Four Operating Configurations • • •


    Original     		PDF 5300S Standards1T48C ispClock5300S ispClock5312S: 48-pin ispPACCLK5312S-01T48C

    LVCMOS25

    Abstract: LVCMOS33 CLK5610
    Text: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer March 2007 Data Sheet DS1019 • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features ■ ■


    Original     		PDF DS1019 400MHz pClock5600A LVCMOS25 LVCMOS33 CLK5610

    Untitled

    Abstract: No abstract text available
    Text: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended June 2006 Preliminary Data Sheet DS1010 Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations • •


    Original     		PDF 5300S DS1010

    MAX9312

    Abstract: JESD51-7 MAX9312ECJ MAX9314 MAX9314ECJ MC100EP210 MC100LVEP210 TQFN-ep 20 pcb footprint
    Text: 19-2079; Rev 2; 4/09 Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Features The MAX9312/MAX9314 are low skew, dual 1-to-5 differential drivers designed for clock and data distribution. These devices accept two inputs. Each input is reproduced at five differential outputs. The differential


    Original     		PDF MAX9312/MAX9314 MAX9312, MAX9314, MAX9312/MAX9314 MAX9312 JESD51-7 MAX9312ECJ MAX9314 MAX9314ECJ MC100EP210 MC100LVEP210 TQFN-ep 20 pcb footprint

    Untitled

    Abstract: No abstract text available
    Text: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer January 2006 Preliminary Data Sheet • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features


    Original     		PDF 400MHz ispPAC-CLK5620AV-01T100C

    ISPPAC-CLK5610AV-01TN48I

    Abstract: ISPCLOCK5600A LVCMOS25 LVCMOS33 ispPAC-CLK5610AV-01T48C
    Text: ispClock 5600A Family In-System Programmable, Enhanced Zero-Delay Clock Generator with Universal Fan-Out Buffer June 2008 Data Sheet DS1019 • Up to Five Clock Frequency Domains ■ Flexible Clock Reference and External Feedback Inputs Features ■ ■


    Original     		PDF DS1019 400MHz ISPPAC-CLK5610AV-01TN48I ISPCLOCK5600A LVCMOS25 LVCMOS33 ispPAC-CLK5610AV-01T48C

    Untitled

    Abstract: No abstract text available
    Text: 19-2078; Rev 2; 10/02 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers The MAX9311/MAX9313 are low-skew, 1-to-10 differential drivers designed for clock and data distribution. These devices allow selection between two inputs. The selected input is reproduced at 10 differential outputs.


    Original     		PDF MAX9311/MAX9313 1-to-10 21-0054F C32-1* MAX9313ECJ MAX9313ECJ-T MAX9313EGJ 21-0091I G3255-1*

    Untitled

    Abstract: No abstract text available
    Text: 19-2078; Rev 1; 2/02 1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers Both devices are offered in space-saving, 32-pin 5mm ✕ 5mm TQFP, 5mm x 5mm QFN, and industry-standard 32-pin 7mm x 7mm LQFP packages. Applications Precision Clock Distribution


    Original     		PDF MAX9311/MAX9313 1-to-10 5x5x01 MAX9311/MAX9313

    ispCLOCK5406D

    Abstract: No abstract text available
    Text: ispClockTM 5400D Family In-System Programmable, Ultra-Low Jitter Zero Delay and Fan-Out Buffer, Differential May 2013 Data Sheet DS1025 Features  Up to 10 Programmable Fan-out Buffers CleanClock PLL • Programmable differential output standards and


    Original     		PDF 5400D DS1025 ispClock5400D ispCLOCK5406D

    flexcan to mscan

    Abstract: No abstract text available
    Text: Motor Control. Digital Power Conversion. Control Loops. Digital Signal Controllers Product Summary Digital Signal Controllers freescale.com/DSC Product Summary Digital Signal Controllers Digital Signal Controllers Part Number Package Flash KB RAM (KB) FlexMem


    Original     		PDF 12-bit 12-bit 16-bit flexcan to mscan

    ispClock5304S

    Abstract: No abstract text available
    Text: ispClock 5300S Family In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended May 2006 Preliminary Data Sheet Features • Up to +/- 5ns skew range • Coarse and fine adjustment modes • Four Operating Configurations • • • •


    Original     		PDF 5300S spPACCLK5308S-01T48C ispClock5312S: 48-pin ispClock5300S ispPACCLK5312S-01T48C ispClock5304S

    u6055b

    Abstract: Telefunken Electronic u6055b U6056B TELEFUNKEN El 156 Telefunken Electronic 6050B 6052B U6055B-FP U6056B-FP SMQ Series 510 DIODE
    Text: • M4E D E3 a^aoo^b 0Q10A52 2 E3ALGG TELEFUNKEN ELECTRONIC U 6055 B • U 6056 B MICROCOMPUTER CONTROLLED LOCAL MULTIPLEX SYSTEM Technology: Bipolar Application: Transmitter U6055 B and receiver (U 6056 B) for "parallel-seriai-parallel"-conversion of a 8 or 16 bit


    OCR Scan     		PDF U6055 U6055B-FP) 16R15R T-75-45-07 IO-15IB| u6055b Telefunken Electronic u6055b U6056B TELEFUNKEN El 156 Telefunken Electronic 6050B 6052B U6055B-FP U6056B-FP SMQ Series 510 DIODE

    DIN 32 676

    Abstract: No abstract text available
    Text: 4bE D • b 7 2 M 2 4 Q D D 1 G D 2 M 154 H O K I J O K I S E M I C O N D U C T O R GR OU P O K I semiconductor 7 MSM28C64A_ T - y ^ / i 8K x 8 BIT CM O S ELECTRICALLY ERASABLE & PROGRAMABLE ROM GENERAL DESCRIPTION The MSM28C64ARS is a CMOS electrically erasable and program m able read only m emory


    OCR Scan     		PDF MSM28C64A MSM28C64ARS 312ps/byte. b72424Q MSM28C64A T-46-13-27 b7E4S40 DIN 32 676

    U0100

    Abstract: No abstract text available
    Text: 4bE D • b 7 2 M 2 4 Q D D 1 G D 2 M 124 H O K I J O K I S E M I C O N D U C T O R GR OU P O K I semiconductor 7 MSM28C64A_ T - y ^ / i 8K x 8 BIT C M O S ELEC TR ICA LLY ERA SA B LE & P R O G R A M A B LE ROM G EN ER A L DESCRIPTION The MSM28C64ARS is a CMOS electrically erasable and programmable read only memory


    OCR Scan     		PDF MSM28C64A_ MSM28C64ARS 312ps/byte. MSM28C64A T-46-13-27 MSM28C64A U0100