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    Teledyne e2v CY7C225A-30DMB

    PROM, 512 X 8, REGISTERED, 30 NS ACCESS - Rail/Tube (Alt: CY7C225A-30DMB)
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    Vishay Intertechnologies RNR55C5230DMBSL

    HDN-55 523 .5% T-2 RNR55C5230DM BSL - Bulk (Alt: RNR55C5230DMBSL)
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    Vishay Intertechnologies RNR60C5230DMBSL

    HDN-60 523 .5% T-2 RNR60C5230DM BSL - Bulk (Alt: RNR60C5230DMBSL)
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    Vishay Intertechnologies RNR65E5230DMBSL65

    HDN-65-65 523 .5% T-9 RNR65E5230DM BSL - Bulk (Alt: RNR65E5230DMBSL65)
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    Vishay Intertechnologies RNR60E5230DMBSL

    HDN-60 523 .5% T-9 RNR60E5230DM BSL - Bulk (Alt: RNR60E5230DMBSL)
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    30DMB Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    20G10-25

    Abstract: 20G10-30 20G10B-20 20G10B-25 12L10 16L6 18L4 20L10 20L8 20G108
    Text: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Fully AC and DC tested


    Original
    PLDC20G10B/PLDC20G10 24-Pin 20G10-25 20G10-30 20G10B-20 20G10B-25 12L10 16L6 18L4 20L10 20L8 20G108 PDF

    transistor c331

    Abstract: c331 transistor C3318 C3317 C331 C3311 C331 datasheet CY7C331 20HC c331 equivalent
    Text: CY7C331 Asynchronous Registered EPLD Features • Low power — 90 mA typical ICC quiescent • Twelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — 180 mA ICC maximum — UV-erasable and reprogrammable — One feedback flip-flop with input coming from the


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    CY7C331 CY7C331 transistor c331 c331 transistor C3318 C3317 C331 C3311 C331 datasheet 20HC c331 equivalent PDF

    12L10

    Abstract: 16L6 20L10 20L8 PLDC20G10 PLDC20G10B ULTRA37000
    Text: PLDC20G10B PLDC20G10 USE ULTRA37000 FOR ALL NEW DESIGNS CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns — Military: tPD = 20 ns, tCO = 15 ns, tS = 15 ns


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    PLDC20G10B PLDC20G10 ULTRA37000TM 24-Pin 20L10, 12L10, PLDC20G10B/PLDC20G10 12L10 16L6 20L10 20L8 PLDC20G10 PLDC20G10B ULTRA37000 PDF

    CY7C419

    Abstract: CY7C420 CY7C421 CY7C425 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 7C43
    Text: fax id: 5404 /25/29/ CY7C419/21/25/29/33 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features • 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of


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    CY7C419/21/25/29/33 300-mil IDT7200, IDT7201, IDT7202, IDT7203, IDT7204 CY7C419 CY7C420 CY7C421 CY7C425 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 7C43 PDF

    20G10

    Abstract: 20G10B-20 12L10 16L6 18L4 20L10 20L8
    Text: fax id: 6014 1P LDC20 G1 0B/P LD C20 G1 0 PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Features • CMOS EPROM technology for reprogrammability • Highly reliable — Uses proven EPROM technology • Fast — Commercial: tPD = 15 ns, tCO = 10 ns, tS = 12 ns


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    LDC20 PLDC20G10B/PLDC20G10 24-Pin 20G10 20G10B-20 12L10 16L6 18L4 20L10 20L8 PDF

    CY7C425

    Abstract: CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203 C4203
    Text: 19/21/25/29/ CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425) 2K x 9 (CY7C429)


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    CY7C419/21/25/29/33 256/512/1K/2K/4K CY7C419) CY7C421) CY7C425) CY7C429) CY7C433) 300-mil 600-mil IDT7200, CY7C425 CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203 C4203 PDF

    DATASHEET AM7202

    Abstract: CY7C429-20JC 330 j65 CY7C433-30JI CY7C425 CY7C433-30JC CY7C429-15JI CY7C419 CY7C421 CY7C429
    Text: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421) • 1K x 9 (CY7C425) • 2K x 9 (CY7C429)


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    CY7C419/21/25/29/33256/512/1K/2K/4K CY7C419/21/25/29/33 256/512/1K/2K/4K CY7C419) CY7C421) CY7C425) CY7C429) CY7C433) 300-mil 600-mil DATASHEET AM7202 CY7C429-20JC 330 j65 CY7C433-30JI CY7C425 CY7C433-30JC CY7C429-15JI CY7C419 CY7C421 CY7C429 PDF

    CY7C225A

    Abstract: No abstract text available
    Text: CY7C225A '= C Y P R E S S Features • CMOS for optimum speed/power • High speed — 18 ns address set-up — 12 ns clock to output • Low power — 495 mW commercial — 660 mW (military) • Synchronous and asynchronous out­ put enables • On-chip edge-triggered registers


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    CY7C225A 300-mil, 24-pin 28-pin CY7C225A CY7C225A-40PC 24-Lead 300-Mil) CY7C225Aâ PDF

    L496D

    Abstract: 9l reset CY7C331 ST L11922 0423-J
    Text: CY7C331 -W C Y P R E S S Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coining from the I/O pin — Independent product term set,


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    CY7C331 28-pin CY7C331 -40TMB 28-Lead CY7C331â 40WMB 28-Lead 300-Mil) L496D 9l reset ST L11922 0423-J PDF

    16L88

    Abstract: PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB
    Text: 256=^2 ooQb^o s d c y p MbE D CYPRESS SEMICONDUCTOR PAL C20 Series ~ SEMICONDUCTOR Features • CMOS EPROM technology for « p ro ­ grammability • High performance at quarter power • — tpo = 25 ns — ts = 20 ns — tco = 15 ns — Ice = 45 mA • High performance at military


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    PALC16R8L-35VC PALC16R8L-35WC PALC16R8â PALC16R8-35PC/PI PALC16R8-35VC/VC PALC16R8-35WCAVC PALC16R8-40DMB PALC16R8-40KMB PALC16R8-40LMB PALC16R8-40QMB 16L88 PALC20 PALC16R6-20DMB cypress 16R4 PALC16L8-30DMB 16L8 16R4 16R6 16R8 PALC16R6-30DMB PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C451 CY7C453 m r cypress Functional Description Features • 512 x 9 CY7C451 and 2,048 x 9 (CY7C453) FIFO buffer memory • Expandable in width and depth • High-speed 70-MHz standalone; 50-MHz cascaded • Supports free-running 50% duly cycle clock inputs


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    CY7C451 CY7C453 CY7C451) CY7C453) 70-MHz 50-MHz 300-mil 32-pin DD15475 PDF

    Untitled

    Abstract: No abstract text available
    Text: Asynchronous Registered EPLD 13 inputs, 12 feedback VO pins, plus 6 shared I/O macrocell feedbacks for a total of 31 true and complementary inpnts High speed: 20 ns maximum tpo Security bit Space-saving 28-pin slim-line DIP package; also available in 28-pin


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    28-pin 28-pin termW22 28-Lead 300-Mil) CY7C331 001305b PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C909 CY7C911 CYPRESS SEMICONDUCTOR Features • Fast — CY7C909/11 has a 30-ns min. clock-to-output cycle time (com­ mercial and military) • Low power — Ic c (max.) = 55 mA (commercial and militaiy) • V cc margin — 5V+10% — All parameters guaranteed over


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    CY7C909 CY7C911 CY7C909/11 30-ns Am2909A/Am29IlA CY7C909 CY7C911 7C909) PDF

    AC-231

    Abstract: No abstract text available
    Text: CY7B201 PRELIMINARY s CYPRESS . r SEMICONDUCTOR Reprogrammable 128K x 8 Power-Down PROM Features Functional Description • BiFAMOS for optimum speed/ power The CY7B201 is a high-performance 1-megabit BiFAMOS PROM organized in 128 Kbytes. It is available in 32-pin,


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    CY7B201 32-pin, 600-mil 32-pin CY7B201 CY7B201â AC-231 PDF

    CY7C429-25PC

    Abstract: CY7C420 CY7C421 CY7C425 CY7C429 IDT7201 IDT7202 IDT7203 CY7C429-30DC vcy7
    Text: bSE D • S S ö ^ b b E O O l O bB l bTD I CYPRESS SEMICONDUCTOR CYPRESS SEMICONDUCTOR ICYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 Cascadable 512 x 9 FIFO Cascadable lK x 9 FIFO Cascadable 2K x 9 FIFO • TTL compatible • Three-state outputs


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    CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 300-miI 300-mil CY7C421, CY7C429-25PC CY7C420 IDT7201 IDT7202 IDT7203 CY7C429-30DC vcy7 PDF

    CY7c911

    Abstract: CY7C909 stk 654 C909 CY7C911-30PC Register push pop
    Text: CY7C909 CY7C911 CMOS Micro Program Sequencers CYPRESS SEMICONDUCTOR Features • Fast — CY7C909/11 has a 30-ns min. clock-to-output cycle time (com­ mercial and military) • Low power — Icc (max.) = 55 mA (commercial and military) • V<x' margin —5V+1»%


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    CY7C909/11 30-ns Am2909A/Am2911A CY7C909 CY7C911 7C909) -00015-B stk 654 C909 CY7C911-30PC Register push pop PDF

    Untitled

    Abstract: No abstract text available
    Text: PERFORMANCE SEMICONDUCTOR 20E D • 7 0 b 2 5 ci? 0 0 0 0 5 7 = } 7 P4C168/P4C168L, P4C169, P4C170 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS SCRAMS FEATURES Three Options - P4C168/L Low Power Standby Mode - P4C169 Fast Chip Select Control - P4C170 Fast Chip Select, Output Enable


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    P4C168/P4C168L, P4C169, P4C170 P4C168/L P4C169 P4C170 P4C168 P4C168L Stan4C169 PDF

    B 503 Potentiometers

    Abstract: cy7c421 COML-55 FF p21 CY7C419 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204
    Text: CY7C419/21/25/29/33 r* CYPRESS Features • 256 x 9, 512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent o f depth/width • Low operating power — I c c i = 35 mA


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    CY7C419/21/25/29/33 300-mil IDT7200, IDT7201, IDT7202, IDT7203, IDT7204 256x9 512x9, B 503 Potentiometers cy7c421 COML-55 FF p21 CY7C419 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 PDF

    C3317

    Abstract: L1190 CY7331
    Text: Asynchronous Registered EPLD Features • TWelve I/O macrocells each having: — One state flip-flop with an XOR sum-of-products input — One feedback flip-flop with input coming from the I/O pin — Independent product term set, reset, and clock inputs on all


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    28-pin 28-Lead 28-Lead 300-Mil) CY7C331 0Dlb56b C3317 L1190 CY7331 PDF

    CY7C425-15JI

    Abstract: 7C419
    Text: 2 5 6 x 9 , 5 1 2 x 9 , 1K x 9, 2 K x 9 , 4 K x 9 C ascadable FIFO Features • 256 x 9,512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of depth/width


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    300-mil IDT7200, IDT7291, IDT7202, IDT7203, IDT7204 CY7C419, CY7C420/1, CY7C424/5, CY7C425-15JI 7C419 PDF

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CYPRESS SEMICONDUCTOR trolled by a free-running clock CKW and a write enable pin (ENW). Functional Description The CY7C445, CY7C446, CY7C447, CY7C455, CY7C456, and CY7C457 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and


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    CY7C445, CY7C446, CY7C447, CY7C455, CY7C456, CY7C457 CY7C445 CY7C455 512-word CY7C446 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLDC20G10B/PLDC20G10 CMOS Generic 24-Pin Reprogrammable Logic Device Generic architecture to replace stan­ dard logic functions including: 20L10, 20L8,20R8,20R6,20R4,12L10,14L8, 16L6,18L4,20L2, and 20V8 Eight product term s and one OE product term per output


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    PLDC20G10B/PLDC20G10 24-Pin 20L10, 12L10 CG7C323 PLD20G10 28-pin 00019-F PDF

    Untitled

    Abstract: No abstract text available
    Text: /o*t*ì j . iv iu i i u a y , Revision: Wednesday, December 16,1992 SSSa^AK 2 3 1993 PRELIMINARY CYPRESS = = = £ : SEMICONDUCTOR • 512 x 18 CY 7C445and CY7C455 , 1,024 x 18 (CY7C446 and CY7C456), 2,048 x 18 (CY7C447 and CY7C457) FIFO buffer memory • Expandable in width


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    7C445and CY7C455) CY7C446 CY7C456) CY7C447 CY7C457) CY7C455, CY7C456, CY7C457 70-MHz PDF

    CY7C425

    Abstract: CY7C420 CY7C429-30DC CY7C42I-25JI CY7C421-40DC CY7C421 CY7C429 IDT7201 IDT7203 CY7C429-30PC
    Text: 4bE D CYPRESS SSflTbbS □007117 5 OCYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428* CY7C429 SEMICONDUCTOR CYPRESS SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable IK x 9 FIFO Cascadeable 2K x 9 FIFO 'T - 'A W • TTL compatible • Three-state outputs • Pin compatible and functional


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    CY7C420, CY7C421 CY7C424, CY7C425 CY7C428Â CY7C429 333-MHz 300-mil outpCY7C429 CY7C420 CY7C429-30DC CY7C42I-25JI CY7C421-40DC IDT7201 IDT7203 CY7C429-30PC PDF