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    1K TRANSMIT BUFFER Search Results

    1K TRANSMIT BUFFER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    AM7968-125DC Rochester Electronics LLC AM7968 - TAXIchip (Transparent Asynchronous Xmitter-Reciever Interface), Transmit Interface Visit Rochester Electronics LLC Buy
    AM7968-125JC Rochester Electronics LLC AM7968 - TAXIchip (Transparent Asynchronous Xmitter-Reciever Interface), Transmit Interface Visit Rochester Electronics LLC Buy

    1K TRANSMIT BUFFER Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    200B

    Abstract: 24LC41A
    Text: 24LC41A 1K/4K 2.5V Dual Mode, Dual Port I2C Serial EEPROM PACKAGE TYPE PDIP Upon power-up, the DDC Monitor Port will be in the Transmit-Only Mode, repeatedly sending a serial bit stream of the entire memory array contents, clocked by the VCLK pin. A valid high to low transition on the DSCL


    Original     		24LC41A DS21176A-page 200B 24LC41A PDF

    OSC 125MHz

    Abstract: U17E AX88655 AX88655P CRYSTAL 27MHZ 8c350 AT24C16B
    Text: AX88655 P 5-Port 10/100/1000BASE-T Ethernet Switch 5-Port Gigabit Ethernet Switch with Embedded Memory Document No.: AX88655-1.0 / V1.0 / Mar, 12,2002 Features • • • • • • • • • 5-Port Gigabit Ethernet switch integrating MACs, packet buffer memory and switching engine with


    Original     		AX88655 10/100/1000BASE-T AX88655-1 OSC 125MHz U17E AX88655P CRYSTAL 27MHZ 8c350 AT24C16B PDF

    HFA3726

    Abstract: HFA3824 SSB Modulator application note suppression filter MC-104M50-7U08-NI AN9746 AN9746.2
    Text: Using the PRISM HFA3726EVAL Evaluation Board Application Note March 2000 AN9746.2 Author: Raphael L. Matarazzo Introduction band operation, the Local Oscillator frequency input is required to be twice the desired frequency for modulation/demodulation. A buffered, divide by 2, LO single ended


    Original     		HFA3726EVAL AN9746 30MHz 400MHz. HFA3726 MHB10G-ND TSW-120-08GS 20-08GS SNT100BKT HFA3726 HFA3824 SSB Modulator application note suppression filter MC-104M50-7U08-NI AN9746.2 PDF

    evm1ss

    Abstract: Frequency Doubler 30Mhz AN9746 9746 PCC103BQCT-ND LL1608-F10NK HFA3726 HFA3824 HFA3825 schematic diagram pulse shaping
    Text: Using the PRISM HFA3726EVAL Evaluation Board Application Note June 1998 AN9746.1 Author: Raphael L. Matarazzo Introduction band operation, the Local Oscillator frequency input is required to be twice the desired frequency for modulation/demodulation. A buffered, divide by 2, LO single ended


    Original     		HFA3726EVAL AN9746 30MHz 400MHz. HFA3726 evm1ss Frequency Doubler 30Mhz 9746 PCC103BQCT-ND LL1608-F10NK HFA3824 HFA3825 schematic diagram pulse shaping PDF

    high impedance rf voltmeter circuit diagrams

    Abstract: 08GS HFA3724 HFA3824 HSP3824 evm1ssx50 ic tester AC digital voltmeter diagram bead 500kHz IND FXD
    Text: Using the PRISM HFA3724EVAL Evaluation Board Application Note August 1998 AN9622.1 Author: Raphael L. Matarazzo Introduction modulation/demodulation. A buffered, divide by 2, LO single ended 50Ω selectable output is provided for convenience of PLL designs. The receive down converter


    Original     		HFA3724EVAL AN9622 30MHz 400MHz. HFA3724 high impedance rf voltmeter circuit diagrams 08GS HFA3824 HSP3824 evm1ssx50 ic tester AC digital voltmeter diagram bead 500kHz IND FXD PDF

    st 9622

    Abstract: IC Generator to 2MHz square LL1608-F10NK HFA3724 HSP3824 evm1ssx50
    Text: Using the PRISM HFA3724EVAL Evaluation Board TM Application Note March 2000 AN9622.2 Author: Raphael L. Matarazzo Introduction modulation/demodulation. A buffered, divide by 2, LO single ended 50Ω selectable output is provided for convenience of PLL designs. The receive down converter mixers “I” and “Q”


    Original     		HFA3724EVAL AN9622 30MHz 400MHz. HFA3724 st 9622 IC Generator to 2MHz square LL1608-F10NK HSP3824 evm1ssx50 PDF

    aui isolation transformer

    Abstract: 78Q8392L-28CH 78Q8392L 78Q8392L-CP
    Text: 78Q8392L Low Power Ethernet Coaxial Transceiver February 1998 DESCRIPTION FEATURES The 78Q8392L Ethernet Transceiver is a low power BiCMOS coax line transmitter/receiver. The device includes analog transmit and receive buffers, a 10 MHz on-board oscillator, timing logic for jabber and


    Original     		78Q8392L 78Q8392L 10Base5 10Base2 aui isolation transformer 78Q8392L-28CH 78Q8392L-CP PDF

    78Q8392L-28CH

    Abstract: 78Q8392L 78Q8392L-CP RR23
    Text: 78Q8392L Low Power Ethernet Coaxial Transceiver February 1998 DESCRIPTION FEATURES The 78Q8392L Ethernet Transceiver is a low power BiCMOS coax line transmitter/receiver. The device includes analog transmit and receive buffers, a 10 MHz on-board oscillator, timing logic for jabber and


    Original     		78Q8392L 78Q8392L 10Base5 10Base2 8Q8392L 28-Pin 78Q8392L-28CH 78Q8392L-28CH 78Q8392L-CP RR23 PDF

    FSK modulator and demodulator

    Abstract: bpsk modulator transceiver fsk tone encoder Z87000 Z8700000ZEM Z87010 Z87100 Z87200 bpsk modulator direct cordless phone design
    Text: Block Diagram Wi reless Devices DSP C00 CORE ADCs & DACs Device Zilog Superintegration Pr oducts Guide FSK Modulator FSK Demodulator DSP (C00 CORE) 512 Word RAM CODEC Interface TX / RX Buffer Transceiver Control Logic 4KW ROM Data I/O Counter/ Timer 1K byte


    Original     		124-byte Z87010 Z87000 Z87200 Z87100 84-Pin 100-Pin 44-Pin 18-Pin FSK modulator and demodulator bpsk modulator transceiver fsk tone encoder Z87000 Z8700000ZEM Z87010 Z87100 Z87200 bpsk modulator direct cordless phone design PDF

    REALTEK SEMICONDUCTOR

    Abstract: 128 QFP 14x20 RTL8308 24LC02 realtek ethernet programming txe 3x 103 24lc02 datasheet Ethernet Switch Controller
    Text: RTL8308 8-port 10/100 Ethernet Switch Controller with Embedded Memory RTL8308 8-Port 10/100 Ethernet Switch Controller with Embedded Memory The RTL8308 chip is a 128-pin low cost and ultra low power consumption 8-port 10/100M Ethernet switch controller integrated both with a 2M bits embedded DRAM as packet buffer


    Original     		RTL8308 RTL8308 128-pin 10/100M 50MHz 10/100Mbps 14x20 REALTEK SEMICONDUCTOR 128 QFP 14x20 24LC02 realtek ethernet programming txe 3x 103 24lc02 datasheet Ethernet Switch Controller PDF

    micrel KS8995

    Abstract: KS8995 ks8995e YCL PH406466 802.1q trunk HB726-1 AT24C01A H1164 HB826-2 micrel mii
    Text: KS8995E Micrel KS8995E 5-Port 10/100 Integrated Switch with PHY and Frame Buffer Rev. 1.10 On the media side, the KS8995E supports 10BaseT, 100BaseTX and 100BaseFX as specified by the IEEE 802.3 committee. Physical signal transmission and reception are enhanced


    Original     		KS8995E KS8995E 10BaseT, 100BaseTX 100BaseFX KS8995 micrel KS8995 YCL PH406466 802.1q trunk HB726-1 AT24C01A H1164 HB826-2 micrel mii PDF

    automatic WATER LEVEL pump CONTROL

    Abstract: chilled water system
    Text: Data Sheet, Revision 3 September 21, 2005 TSI-1 1k x 1k Time-Slot Interchanger 1 Introduction The last issue of this data sheet was August 31, 2005. A change history is included in Section 11 Change History on page 61. Red change bars have been installed on all text, figures, and tables that were added or changed. All changes to the text


    Original     		condit138 DS05-115STSI-3 DS05-115STSI-2) automatic WATER LEVEL pump CONTROL chilled water system PDF

    RXD03

    Abstract: No abstract text available
    Text: Data Sheet May 27, 2005 TSI-1 1k x 1k Time-Slot Interchanger 1 Introduction This document consists of two major sections: „ The TTSI001041 device hardware description. This section contains ball information, operating conditions, dc electrical characteristics, timing diagrams, ac characteristics, and packaging information.


    Original     		TTSI001041 TTSI-144 0A-301C, DS05-115STSI RXD03 PDF

    RTL8308

    Abstract: RTL8308B 128 QFP 14x20 Reference clock RMII 24LC02 93C46 realtek ethernet programming Ethernet Switch Controller 4LC02 realtek 8051
    Text: RTL8308B REALTEK SINGLE CHIP 8-PORT 10/100 ETHERNET SWITCH CONTROLLER WITH EMBEDDED MEMORY RTL8308B 6.10 Back off Algorithm . 15 6.11 Inter-Frame Gap . 15 6.12 Buffer Management. 15


    Original     		RTL8308B 14x20 530-ASS-P004 RTL8308 RTL8308B 128 QFP 14x20 Reference clock RMII 24LC02 93C46 realtek ethernet programming Ethernet Switch Controller 4LC02 realtek 8051 PDF

    kendin ks8993

    Abstract: KS8993 MICREL PQFP DATE CODE reverse MII timing
    Text: CONFIDENTIAL INFORMATION REV 1.16 KS8993 3 port 10/100 Integrated Switch with PHY and Frame Buffer Highlights • • • • • • • • • • • • • • • • • • • • • • 3 port 10/100 Integrated Switch with Physical Layer Transceivers


    Original     		KS8993 10BaseT, 100BaseTX 100BaseFX kendin ks8993 KS8993 MICREL PQFP DATE CODE reverse MII timing PDF

    RJ754-C-NL

    Abstract: 16Kx32 pulse h1012 HB614-1 KS8993 RJ754 reverse MII timing YCL Transformer PH406080 KSZ8993
    Text: KS8993 Micrel KS8993 3-Port 10/100 Integrated Switch with PHY and Frame Buffer Rev. 2.06 The KS8993 has rich features such as VLAN and priority queuing and is designed to reside in an unmanaged design not requiring processor intervention. This is achieved through


    Original     		KS8993 KS8993 10BaseT, 100BaseTX 100BaseFX KS899tomer. RJ754-C-NL 16Kx32 pulse h1012 HB614-1 RJ754 reverse MII timing YCL Transformer PH406080 KSZ8993 PDF

    Untitled

    Abstract: No abstract text available
    Text: KS8993 Micrel KS8993 3-Port 10/100 Integrated Switch with PHY and Frame Buffer Rev. 2.06 The KS8993 has rich features such as VLAN and priority queuing and is designed to reside in an unmanaged design not requiring processor intervention. This is achieved through


    Original     		KS8993 KS8993 10BaseT, 100BaseTX 100BaseFX PDF

    KS8993

    Abstract: RJ754-C-NL KS8993I PV32 ycl 20pmt04 center tap transformer pulse h1012
    Text: KS8993 Micrel KS8993 3-Port 10/100 Integrated Switch with PHY and Frame Buffer Rev. 2.04 The KS8993 has rich features such as VLAN and priority queuing and is designed to reside in an unmanaged design not requiring processor intervention. This is achieved through


    Original     		KS8993 KS8993 10BaseT, 100BaseTX 100BaseFX KS899mer. RJ754-C-NL KS8993I PV32 ycl 20pmt04 center tap transformer pulse h1012 PDF

    RJ45 1000M PHY

    Abstract: 88E1000 AMD79C901 88E3081 49fct3807 CRS15 rmii trace layout guidelines
    Text: ZLAN-86 Ethernet Switch Ethernet Interfaces Reference Design Application Note Contents January 2004 3.3.1 M_CLK 3.3.2 G_REFCLK 3.3.3 10/100 MHz Ethernet Physical layer 3.3.4 Gigabit Ethernet Physical layer 1.0 Introduction 2.0 Interface Overview 2.1 Fast Ethernet


    Original     		ZLAN-86 RJ45 1000M PHY 88E1000 AMD79C901 88E3081 49fct3807 CRS15 rmii trace layout guidelines PDF

    HT6570

    Abstract: Ht6550a HT6571 NE558 interface fdd 720k RP4A RP3D
    Text: HT6551 Super I/O Controller Features • • • • 100% compatible to IBM PC AT/XT Fully IBM–BIOS compatible floppy disk controller – 48mA floppy drive interface buffers – Support two floppy drives with capability of supporting up to four drives with an


    Original     		HT6551 360K/720K/1 44M/2 250Kb/s, 300Kb/s, 500Kb/s, SLOT-36P HT6570 Ht6550a HT6571 NE558 interface fdd 720k RP4A RP3D PDF

    RJ754-C-NL

    Abstract: KS8995 HB826-10 RJG4-754-C-NL H1117 3.3v micrel KS8995 HB826 RJ754-C
    Text: CONFIDENTIAL INFORMATION INFORMATION CONFIDENTIAL REV 1.24 1.24 REV KS8995 5 port 10/100 Integrated Switch with PHY and Frame Buffer Highlights • • • • • • • • • • • • • • • • • • • • • 5 port 10/100 Integrated Switch with Physical Layer Transceivers


    Original     		KS8995 32Kx32 10BaseT, 100BaseTX 100BaseFX RJ754-C-NL KS8995 HB826-10 RJG4-754-C-NL H1117 3.3v micrel KS8995 HB826 RJ754-C PDF

    KS8997

    Abstract: 128-PIN PQFP
    Text: KS8997 Product Brief 8 Port 10/100 Integrated Switch with PHY and Frame Buffers Introduction • The KS8997 contains eight 10/100 physical layer transceivers, eight MAC Media Access Control units with an integrated layer 2 switch. The device runs as an eight port integrated switch.


    Original     		KS8997 KS8997 10BaseT 100BaseTX 128-PIN PQFP PDF

    78Q8392

    Abstract: No abstract text available
    Text: SSI 78Q8392 ó m m s is k m A TDK Group/Company Ethernet Coaxial Transceiver s December 1994 DESCRIPTION FEATURES The SSI 78Q8392 Ethernet Transceiver is a high speed, bipolar coax line transmitter/receiver.The device includes analog transmit and receive buffers, a 10 MHz


    OCR Scan     		78Q8392 78Q8392 78Q8392-CP 78Q8392-28CH 78Q8392-28CH PDF

    Untitled

    Abstract: No abstract text available
    Text: SSI 78Q8392 SiliconSifskms Ethernet Coaxial Transceiver A TDK Group/Company December 1994 DESCRIPTION FEATURES The SSI 78Q8392 Ethernet Transceiver is a high speed, bipolar coax linetransmitter/receiver. The device includes analog transmit and receive buffers, a 10 MHz


    OCR Scan     		78Q8392 78Q8392 10Base5 78Q8392-CP 28-Pin 78Q8392-28CH PDF